3886 	radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in cik_ring_test()
3942 	radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in cik_hdp_flush_cp_ring_emit()
3971 	radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in cik_fence_gfx_ring_emit()
3983 	radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in cik_fence_gfx_ring_emit()
4010 	radeon_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));  in cik_fence_compute_ring_emit()
4041 	radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));  in cik_semaphore_ring_emit()
4047 		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in cik_semaphore_ring_emit()
4102 		radeon_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));  in cik_copy_cpdma()
4149 		radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in cik_ring_ib_execute()
4152 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);  in cik_ring_ib_execute()
4157 			radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in cik_ring_ib_execute()
4163 			radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_ring_ib_execute()
4170 		header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);  in cik_ring_ib_execute()
4211 	ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);  in cik_ib_test()
4405 	radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));  in cik_cp_gfx_start()
4411 	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_cp_gfx_start()
4414 	radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in cik_cp_gfx_start()
4421 	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_cp_gfx_start()
4425 	radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in cik_cp_gfx_start()
4428 	radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in cik_cp_gfx_start()
6115 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6129 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6136 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6));  in cik_vm_flush()
6147 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6158 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
6166 	radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in cik_vm_flush()
6179 		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in cik_vm_flush()
7155 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_get_csb_buffer()
7158 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in cik_get_csb_buffer()
7166 					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in cik_get_csb_buffer()
7176 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in cik_get_csb_buffer()
7202 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_get_csb_buffer()
7205 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));  in cik_get_csb_buffer()
8640 			nop = PACKET3(PACKET3_NOP, 0x3FFF);  in cik_startup()
8644 		nop = PACKET3(PACKET3_NOP, 0x3FFF);  in cik_startup()