1872 	u32 running, blackout = 0, tmp;  in ci_mc_load_microcode()  local
3561 	u32 tmp;  in cik_gpu_init()  local
3870 	uint32_t tmp = 0;  in cik_ring_test()  local
4195 	uint32_t tmp = 0;  in cik_ib_test()  local
4464 	u32 tmp;  in cik_cp_gfx_resume()  local
4606 	u32 j, tmp;  in cik_compute_stop()  local
4929 	u32 tmp;  in cik_cp_compute_resume()  local
5258 	u32 tmp;  in cik_gpu_check_soft_reset()  local
5339 	u32 tmp;  in cik_gpu_soft_reset()  local
5553 	u32 tmp, i;  in cik_gpu_pci_config_reset()  local
5681 	u32 tmp;  in cik_mc_program()  local
5737 	u32 tmp;  in cik_mc_init()  local
5925 		u32 tmp = RREG32(CHUB_CONTROL);  in cik_pcie_gart_enable()  local
6053 		u64 tmp = RREG32(MC_VM_FB_OFFSET);  in cik_vm_init()  local
6193 	u32 tmp = RREG32(CP_INT_CNTL_RING0);  in cik_enable_gui_idle_interrupt()  local
6204 	u32 tmp;  in cik_enable_lbpw()  local
6243 	u32 tmp;  in cik_update_rlc()  local
6276 	u32 tmp, i, mask;  in cik_enter_rlc_safe_mode()  local
6297 	u32 tmp;  in cik_exit_rlc_safe_mode()  local
6346 	u32 i, size, tmp;  in cik_rlc_resume()  local
6429 	u32 data, orig, tmp, tmp2;  in cik_enable_cgcg()  local
6467 	u32 data, orig, tmp = 0;  in cik_enable_mgcg()  local
6969 	u32 mask = 0, tmp, tmp1;  in cik_get_cu_active_bitmap()  local
6996 	u32 tmp = 0;  in cik_init_ao_cu_mask()  local
7301 	u32 tmp;  in cik_disable_interrupt_state()  local
7663 	u32 tmp;  in cik_irq_ack()  local
7859 	u32 wptr, tmp;  in cik_get_ih_wptr()  local
9024 	u32 tmp = 0;  in dce8_program_fmt()  local
9097 	u32 tmp, buffer_alloc, i;  in dce8_line_buffer_adjust()  local
9166 	u32 tmp = RREG32(MC_SHARED_CHMAP);  in cik_get_number_of_dram_channels()  local
9398 	u32 tmp, dmif_size = 12288;  in dce8_latency_watermark()  local
9544 	u32 tmp, wm_mask;  in dce8_program_watermarks()  local
9715 	uint32_t tmp;  in cik_set_uvd_clock()  local
9754 	u32 tmp;  in cik_set_vce_clocks()  local
9842 			u32 max_lw, current_lw, tmp;  in cik_pcie_gen3_enable()  local