Lines Matching refs:WREG32

603 				WREG32(config_regs->offset << 2, data);  in ci_program_pt_config_registers()
1651 WREG32(SMC_MSG_ARG_0, parameter); in ci_send_msg_to_smc_with_parameter()
1899 WREG32(SMC_MESSAGE_0, PPSMC_MSG_SwitchToMinimumPower);
1910 WREG32(SMC_MESSAGE_0, PPSMC_MSG_ResumeFromMinimumPower);
4581 WREG32(MC_SEQ_IO_DEBUG_INDEX, 3); in ci_register_patching_mc_seq()
4584 WREG32(MC_SEQ_IO_DEBUG_INDEX, 3); in ci_register_patching_mc_seq()
4585 WREG32(MC_SEQ_IO_DEBUG_DATA, tmp); in ci_register_patching_mc_seq()
4603 WREG32(MC_SEQ_RAS_TIMING_LP, RREG32(MC_SEQ_RAS_TIMING)); in ci_initialize_mc_reg_table()
4604 WREG32(MC_SEQ_CAS_TIMING_LP, RREG32(MC_SEQ_CAS_TIMING)); in ci_initialize_mc_reg_table()
4605 WREG32(MC_SEQ_DLL_STBY_LP, RREG32(MC_SEQ_DLL_STBY)); in ci_initialize_mc_reg_table()
4606 WREG32(MC_SEQ_G5PDX_CMD0_LP, RREG32(MC_SEQ_G5PDX_CMD0)); in ci_initialize_mc_reg_table()
4607 WREG32(MC_SEQ_G5PDX_CMD1_LP, RREG32(MC_SEQ_G5PDX_CMD1)); in ci_initialize_mc_reg_table()
4608 WREG32(MC_SEQ_G5PDX_CTRL_LP, RREG32(MC_SEQ_G5PDX_CTRL)); in ci_initialize_mc_reg_table()
4609 WREG32(MC_SEQ_PMG_DVS_CMD_LP, RREG32(MC_SEQ_PMG_DVS_CMD)); in ci_initialize_mc_reg_table()
4610 WREG32(MC_SEQ_PMG_DVS_CTL_LP, RREG32(MC_SEQ_PMG_DVS_CTL)); in ci_initialize_mc_reg_table()
4611 WREG32(MC_SEQ_MISC_TIMING_LP, RREG32(MC_SEQ_MISC_TIMING)); in ci_initialize_mc_reg_table()
4612 WREG32(MC_SEQ_MISC_TIMING2_LP, RREG32(MC_SEQ_MISC_TIMING2)); in ci_initialize_mc_reg_table()
4613 WREG32(MC_SEQ_PMG_CMD_EMRS_LP, RREG32(MC_PMG_CMD_EMRS)); in ci_initialize_mc_reg_table()
4614 WREG32(MC_SEQ_PMG_CMD_MRS_LP, RREG32(MC_PMG_CMD_MRS)); in ci_initialize_mc_reg_table()
4615 WREG32(MC_SEQ_PMG_CMD_MRS1_LP, RREG32(MC_PMG_CMD_MRS1)); in ci_initialize_mc_reg_table()
4616 WREG32(MC_SEQ_WR_CTL_D0_LP, RREG32(MC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()
4617 WREG32(MC_SEQ_WR_CTL_D1_LP, RREG32(MC_SEQ_WR_CTL_D1)); in ci_initialize_mc_reg_table()
4618 WREG32(MC_SEQ_RD_CTL_D0_LP, RREG32(MC_SEQ_RD_CTL_D0)); in ci_initialize_mc_reg_table()
4619 WREG32(MC_SEQ_RD_CTL_D1_LP, RREG32(MC_SEQ_RD_CTL_D1)); in ci_initialize_mc_reg_table()
4620 WREG32(MC_SEQ_PMG_TIMING_LP, RREG32(MC_SEQ_PMG_TIMING)); in ci_initialize_mc_reg_table()
4621 WREG32(MC_SEQ_PMG_CMD_MRS2_LP, RREG32(MC_PMG_CMD_MRS2)); in ci_initialize_mc_reg_table()
4622 WREG32(MC_SEQ_WR_CTL_2_LP, RREG32(MC_SEQ_WR_CTL_2)); in ci_initialize_mc_reg_table()