407 	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;  in radeon_dp_probe_oui()  local
410 	if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))  in radeon_dp_probe_oui()
424 	struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;  in radeon_dp_getdpcd()  local
432 			memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);  in radeon_dp_getdpcd()
434 			DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd),  in radeon_dp_getdpcd()
435 				      dig_connector->dpcd);  in radeon_dp_getdpcd()
442 	dig_connector->dpcd[0] = 0;  in radeon_dp_getdpcd()
452 	struct radeon_connector_atom_dig *dig_connector;  in radeon_dp_get_panel_mode()  local
463 	dig_connector = radeon_connector->con_priv;  in radeon_dp_get_panel_mode()
493 	struct radeon_connector_atom_dig *dig_connector;  in radeon_dp_set_link_config()  local
497 	dig_connector = radeon_connector->con_priv;  in radeon_dp_set_link_config()
499 	if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||  in radeon_dp_set_link_config()
500 	    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {  in radeon_dp_set_link_config()
501 		dig_connector->dp_clock =  in radeon_dp_set_link_config()
502 			radeon_dp_get_dp_link_clock(connector, dig_connector->dpcd, mode->clock);  in radeon_dp_set_link_config()
503 		dig_connector->dp_lane_count =  in radeon_dp_set_link_config()
504 			radeon_dp_get_dp_lane_number(connector, dig_connector->dpcd, mode->clock);  in radeon_dp_set_link_config()
512 	struct radeon_connector_atom_dig *dig_connector;  in radeon_dp_mode_valid_helper()  local
521 	dig_connector = radeon_connector->con_priv;  in radeon_dp_mode_valid_helper()
524 		radeon_dp_get_dp_link_clock(connector, dig_connector->dpcd, mode->clock);  in radeon_dp_mode_valid_helper()
550 	struct radeon_connector_atom_dig *dig_connector;  in radeon_dp_set_rx_power_state()  local
555 	dig_connector = radeon_connector->con_priv;  in radeon_dp_set_rx_power_state()
558 	if (dig_connector->dpcd[0] >= 0x11) {  in radeon_dp_set_rx_power_state()
821 	struct radeon_connector_atom_dig *dig_connector;  in radeon_dp_link_train()  local
833 	dig_connector = radeon_connector->con_priv;  in radeon_dp_link_train()
835 	if ((dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) &&  in radeon_dp_link_train()
836 	    (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_eDP))  in radeon_dp_link_train()
871 	memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE);  in radeon_dp_link_train()
875 	dp_info.dp_lane_count = dig_connector->dp_lane_count;  in radeon_dp_link_train()
876 	dp_info.dp_clock = dig_connector->dp_clock;  in radeon_dp_link_train()