161 radeon_dp_aux_transfer_atom(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)  in radeon_dp_aux_transfer_atom()  argument
164 		container_of(aux, struct radeon_i2c_chan, aux);  in radeon_dp_aux_transfer_atom()
236 	radeon_connector->ddc_bus->aux.dev = radeon_connector->base.kdev;  in radeon_dp_aux_init()
239 			radeon_connector->ddc_bus->aux.transfer = radeon_dp_aux_transfer_native;  in radeon_dp_aux_init()
241 			radeon_connector->ddc_bus->aux.transfer = radeon_dp_aux_transfer_atom;  in radeon_dp_aux_init()
243 		radeon_connector->ddc_bus->aux.transfer = radeon_dp_aux_transfer_atom;  in radeon_dp_aux_init()
246 	ret = drm_dp_aux_register(&radeon_connector->ddc_bus->aux);  in radeon_dp_aux_init()
413 	if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3)  in radeon_dp_probe_oui()
417 	if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3)  in radeon_dp_probe_oui()
429 		ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_DPCD_REV, msg,  in radeon_dp_getdpcd()
467 		if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,  in radeon_dp_get_panel_mode()
479 		if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux,  in radeon_dp_get_panel_mode()
538 	if (drm_dp_dpcd_read_link_status(&radeon_connector->ddc_bus->aux, link_status)  in radeon_dp_needs_link_train()
559 		drm_dp_dpcd_writeb(&radeon_connector->ddc_bus->aux,  in radeon_dp_set_rx_power_state()
579 	struct drm_dp_aux *aux;  member
590 	drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET,  in radeon_dp_update_vs_emph()
626 	drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp);  in radeon_dp_set_tp()
640 		drm_dp_dpcd_writeb(dp_info->aux,  in radeon_dp_link_train_init()
643 		drm_dp_dpcd_writeb(dp_info->aux,  in radeon_dp_link_train_init()
647 		drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1);  in radeon_dp_link_train_init()
653 	drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp);  in radeon_dp_link_train_init()
657 	drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp);  in radeon_dp_link_train_init()
668 	drm_dp_dpcd_writeb(dp_info->aux,  in radeon_dp_link_train_init()
680 	drm_dp_dpcd_writeb(dp_info->aux,  in radeon_dp_link_train_finish()
714 		if (drm_dp_dpcd_read_link_status(dp_info->aux,  in radeon_dp_link_train_cr()
777 		if (drm_dp_dpcd_read_link_status(dp_info->aux,  in radeon_dp_link_train_ce()
861 	if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp)  in radeon_dp_link_train()
877 	dp_info.aux = &radeon_connector->ddc_bus->aux;  in radeon_dp_link_train()