433 	ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION v1;  member
514 		args.v1.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage);  in atombios_crtc_program_ss()
515 		args.v1.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK;  in atombios_crtc_program_ss()
516 		args.v1.ucSpreadSpectrumStep = ss->step;  in atombios_crtc_program_ss()
517 		args.v1.ucSpreadSpectrumDelay = ss->delay;  in atombios_crtc_program_ss()
518 		args.v1.ucSpreadSpectrumRange = ss->range;  in atombios_crtc_program_ss()
519 		args.v1.ucPpll = pll_id;  in atombios_crtc_program_ss()
520 		args.v1.ucEnable = enable;  in atombios_crtc_program_ss()
548 	ADJUST_DISPLAY_PLL_PS_ALLOCATION v1;  member
686 				args.v1.usPixelClock = cpu_to_le16(clock / 10);  in atombios_adjust_pll()
687 				args.v1.ucTransmitterID = radeon_encoder->encoder_id;  in atombios_adjust_pll()
688 				args.v1.ucEncodeMode = encoder_mode;  in atombios_adjust_pll()
690 					args.v1.ucConfig |=  in atombios_adjust_pll()
695 				adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10;  in atombios_adjust_pll()
755 	PIXEL_CLOCK_PARAMETERS v1;  member
846 			args.v1.usPixelClock = cpu_to_le16(clock / 10);  in atombios_crtc_program_pll()
847 			args.v1.usRefDiv = cpu_to_le16(ref_div);  in atombios_crtc_program_pll()
848 			args.v1.usFbDiv = cpu_to_le16(fb_div);  in atombios_crtc_program_pll()
849 			args.v1.ucFracFbDiv = frac_fb_div;  in atombios_crtc_program_pll()
850 			args.v1.ucPostDiv = post_div;  in atombios_crtc_program_pll()
851 			args.v1.ucPpll = pll_id;  in atombios_crtc_program_pll()
852 			args.v1.ucCRTC = crtc_id;  in atombios_crtc_program_pll()
853 			args.v1.ucRefDivSrc = 1;  in atombios_crtc_program_pll()