39 	struct radeon_device *rdev = dev->dev_private;  in atombios_overscan_setup()  local
76 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_overscan_setup()
82 	struct radeon_device *rdev = dev->dev_private;  in atombios_scaler_setup()  local
92 	if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id)  in atombios_scaler_setup()
149 			if (ASIC_IS_AVIVO(rdev))  in atombios_scaler_setup()
156 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_scaler_setup()
158 	    && rdev->family >= CHIP_RV515 && rdev->family <= CHIP_R580) {  in atombios_scaler_setup()
159 		atom_rv515_force_tv_scaler(rdev, radeon_crtc);  in atombios_scaler_setup()
167 	struct radeon_device *rdev = dev->dev_private;  in atombios_lock_crtc()  local
177 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_lock_crtc()
184 	struct radeon_device *rdev = dev->dev_private;  in atombios_enable_crtc()  local
193 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_enable_crtc()
200 	struct radeon_device *rdev = dev->dev_private;  in atombios_enable_crtc_memreq()  local
209 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_enable_crtc_memreq()
226 	struct radeon_device *rdev = dev->dev_private;  in atombios_blank_crtc()  local
233 	if (ASIC_IS_DCE8(rdev)) {  in atombios_blank_crtc()
241 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_blank_crtc()
243 	if (ASIC_IS_DCE8(rdev)) {  in atombios_blank_crtc()
252 	struct radeon_device *rdev = dev->dev_private;  in atombios_powergate_crtc()  local
261 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_powergate_crtc()
267 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_dpms()  local
274 		if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev))  in atombios_crtc_dpms()
286 		if (ASIC_IS_DCE3(rdev) && !ASIC_IS_DCE6(rdev))  in atombios_crtc_dpms()
293 	radeon_pm_compute_clocks(rdev);  in atombios_crtc_dpms()
302 	struct radeon_device *rdev = dev->dev_private;  in atombios_set_crtc_dtd_timing()  local
341 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_set_crtc_dtd_timing()
349 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_set_timing()  local
387 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_crtc_set_timing()
390 static void atombios_disable_ss(struct radeon_device *rdev, int pll_id)  in atombios_disable_ss()  argument
394 	if (ASIC_IS_DCE4(rdev)) {  in atombios_disable_ss()
410 	} else if (ASIC_IS_AVIVO(rdev)) {  in atombios_disable_ss()
438 static void atombios_crtc_program_ss(struct radeon_device *rdev,  in atombios_crtc_program_ss()  argument
459 		for (i = 0; i < rdev->num_crtc; i++) {  in atombios_crtc_program_ss()
460 			if (rdev->mode_info.crtcs[i] &&  in atombios_crtc_program_ss()
461 			    rdev->mode_info.crtcs[i]->enabled &&  in atombios_crtc_program_ss()
463 			    pll_id == rdev->mode_info.crtcs[i]->pll_id) {  in atombios_crtc_program_ss()
475 	if (ASIC_IS_DCE5(rdev)) {  in atombios_crtc_program_ss()
494 	} else if (ASIC_IS_DCE4(rdev)) {  in atombios_crtc_program_ss()
513 	} else if (ASIC_IS_DCE3(rdev)) {  in atombios_crtc_program_ss()
521 	} else if (ASIC_IS_AVIVO(rdev)) {  in atombios_crtc_program_ss()
524 			atombios_disable_ss(rdev, pll_id);  in atombios_crtc_program_ss()
535 			atombios_disable_ss(rdev, pll_id);  in atombios_crtc_program_ss()
544 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_crtc_program_ss()
557 	struct radeon_device *rdev = dev->dev_private;  in atombios_adjust_pll()  local
571 	if (ASIC_IS_AVIVO(rdev)) {  in atombios_adjust_pll()
572 		if ((rdev->family == CHIP_RS600) ||  in atombios_adjust_pll()
573 		    (rdev->family == CHIP_RS690) ||  in atombios_adjust_pll()
574 		    (rdev->family == CHIP_RS740))  in atombios_adjust_pll()
578 		if (ASIC_IS_DCE32(rdev) && mode->clock > 200000)	/* range limits??? */  in atombios_adjust_pll()
583 		if (rdev->family < CHIP_RV770)  in atombios_adjust_pll()
586 		if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE61(rdev) || ASIC_IS_DCE8(rdev))  in atombios_adjust_pll()
589 		if ((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880))  in atombios_adjust_pll()
591 		if (ASIC_IS_DCE32(rdev) && mode->clock > 165000)  in atombios_adjust_pll()
626 				if (ASIC_IS_AVIVO(rdev))  in atombios_adjust_pll()
632 	if (ASIC_IS_AVIVO(rdev)) {  in atombios_adjust_pll()
669 	if (ASIC_IS_DCE3(rdev)) {  in atombios_adjust_pll()
675 		if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,  in atombios_adjust_pll()
693 				atom_execute_table(rdev->mode_info.atom_context,  in atombios_adjust_pll()
726 				atom_execute_table(rdev->mode_info.atom_context,  in atombios_adjust_pll()
765 static void atombios_crtc_set_disp_eng_pll(struct radeon_device *rdev,  in atombios_crtc_set_disp_eng_pll()  argument
775 	if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,  in atombios_crtc_set_disp_eng_pll()
795 			if (ASIC_IS_DCE61(rdev) || ASIC_IS_DCE8(rdev))  in atombios_crtc_set_disp_eng_pll()
797 			else if (ASIC_IS_DCE6(rdev))  in atombios_crtc_set_disp_eng_pll()
811 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_crtc_set_disp_eng_pll()
829 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_program_pll()  local
836 	if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,  in atombios_crtc_program_pll()
951 	atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);  in atombios_crtc_program_pll()
958 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_prepare_pll()  local
988 			if (ASIC_IS_DCE4(rdev))  in atombios_crtc_prepare_pll()
990 					radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss,  in atombios_crtc_prepare_pll()
996 						radeon_atombios_get_ppll_ss_info(rdev,  in atombios_crtc_prepare_pll()
1001 							radeon_atombios_get_ppll_ss_info(rdev,  in atombios_crtc_prepare_pll()
1006 						radeon_atombios_get_ppll_ss_info(rdev,  in atombios_crtc_prepare_pll()
1015 			if (ASIC_IS_DCE4(rdev))  in atombios_crtc_prepare_pll()
1017 					radeon_atombios_get_asic_ss_info(rdev,  in atombios_crtc_prepare_pll()
1023 					radeon_atombios_get_ppll_ss_info(rdev,  in atombios_crtc_prepare_pll()
1028 			if (ASIC_IS_DCE4(rdev))  in atombios_crtc_prepare_pll()
1030 					radeon_atombios_get_asic_ss_info(rdev,  in atombios_crtc_prepare_pll()
1036 			if (ASIC_IS_DCE4(rdev))  in atombios_crtc_prepare_pll()
1038 					radeon_atombios_get_asic_ss_info(rdev,  in atombios_crtc_prepare_pll()
1058 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_set_pll()  local
1068 	if (ASIC_IS_DCE5(rdev) &&  in atombios_crtc_set_pll()
1075 		pll = &rdev->clock.p1pll;  in atombios_crtc_set_pll()
1078 		pll = &rdev->clock.p2pll;  in atombios_crtc_set_pll()
1083 		pll = &rdev->clock.dcpll;  in atombios_crtc_set_pll()
1096 	else if (ASIC_IS_AVIVO(rdev))  in atombios_crtc_set_pll()
1103 	atombios_crtc_program_ss(rdev, ATOM_DISABLE, radeon_crtc->pll_id,  in atombios_crtc_set_pll()
1113 		if (ASIC_IS_DCE4(rdev)) {  in atombios_crtc_set_pll()
1130 		atombios_crtc_program_ss(rdev, ATOM_ENABLE, radeon_crtc->pll_id,  in atombios_crtc_set_pll()
1141 	struct radeon_device *rdev = dev->dev_private;  in dce4_crtc_do_set_base()  local
1265 		if (rdev->family >= CHIP_TAHITI) {  in dce4_crtc_do_set_base()
1268 			if (rdev->family >= CHIP_BONAIRE) {  in dce4_crtc_do_set_base()
1285 				num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3;  in dce4_crtc_do_set_base()
1300 				num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3;  in dce4_crtc_do_set_base()
1306 			if (rdev->family >= CHIP_CAYMAN)  in dce4_crtc_do_set_base()
1307 				tmp = rdev->config.cayman.tile_config;  in dce4_crtc_do_set_base()
1309 				tmp = rdev->config.evergreen.tile_config;  in dce4_crtc_do_set_base()
1330 		if (rdev->family >= CHIP_BONAIRE) {  in dce4_crtc_do_set_base()
1337 	if (rdev->family >= CHIP_BONAIRE) {  in dce4_crtc_do_set_base()
1341 		u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f;  in dce4_crtc_do_set_base()
1344 	} else if ((rdev->family == CHIP_TAHITI) ||  in dce4_crtc_do_set_base()
1345 		   (rdev->family == CHIP_PITCAIRN))  in dce4_crtc_do_set_base()
1347 	else if ((rdev->family == CHIP_VERDE) ||  in dce4_crtc_do_set_base()
1348 		 (rdev->family == CHIP_OLAND) ||  in dce4_crtc_do_set_base()
1349 		 (rdev->family == CHIP_HAINAN)) /* for completeness.  HAINAN has no display hw */  in dce4_crtc_do_set_base()
1409 	if (rdev->family >= CHIP_BONAIRE)  in dce4_crtc_do_set_base()
1421 	if ((rdev->family >= CHIP_BONAIRE) &&  in dce4_crtc_do_set_base()
1447 	radeon_bandwidth_update(rdev);  in dce4_crtc_do_set_base()
1458 	struct radeon_device *rdev = dev->dev_private;  in avivo_crtc_do_set_base()  local
1563 	if (rdev->family >= CHIP_R600) {  in avivo_crtc_do_set_base()
1581 	if (rdev->family >= CHIP_RV770) {  in avivo_crtc_do_set_base()
1595 	if (rdev->family >= CHIP_R600)  in avivo_crtc_do_set_base()
1647 	radeon_bandwidth_update(rdev);  in avivo_crtc_do_set_base()
1656 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_set_base()  local
1658 	if (ASIC_IS_DCE4(rdev))  in atombios_crtc_set_base()
1660 	else if (ASIC_IS_AVIVO(rdev))  in atombios_crtc_set_base()
1671        struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_set_base_atomic()  local
1673 	if (ASIC_IS_DCE4(rdev))  in atombios_crtc_set_base_atomic()
1675 	else if (ASIC_IS_AVIVO(rdev))  in atombios_crtc_set_base_atomic()
1685 	struct radeon_device *rdev = dev->dev_private;  in radeon_legacy_atom_fixup()  local
1742 	struct radeon_device *rdev = dev->dev_private;  in radeon_get_shared_dp_ppll()  local
1753 			if (ASIC_IS_DCE61(rdev) && !ASIC_IS_DCE8(rdev) &&  in radeon_get_shared_dp_ppll()
1777 	struct radeon_device *rdev = dev->dev_private;  in radeon_get_shared_nondp_ppll()  local
1794 			if (ASIC_IS_DCE61(rdev) && !ASIC_IS_DCE8(rdev) &&  in radeon_get_shared_nondp_ppll()
1856 	struct radeon_device *rdev = dev->dev_private;  in radeon_atom_pick_pll()  local
1862 	if (ASIC_IS_DCE8(rdev)) {  in radeon_atom_pick_pll()
1864 			if (rdev->clock.dp_extclk)  in radeon_atom_pick_pll()
1880 		if ((rdev->family == CHIP_KABINI) ||  in radeon_atom_pick_pll()
1881 		    (rdev->family == CHIP_MULLINS)) {  in radeon_atom_pick_pll()
1902 	} else if (ASIC_IS_DCE61(rdev)) {  in radeon_atom_pick_pll()
1912 			if (rdev->clock.dp_extclk)  in radeon_atom_pick_pll()
1935 	} else if (ASIC_IS_DCE41(rdev)) {  in radeon_atom_pick_pll()
1938 			if (rdev->clock.dp_extclk)  in radeon_atom_pick_pll()
1949 	} else if (ASIC_IS_DCE4(rdev)) {  in radeon_atom_pick_pll()
1961 			if (rdev->clock.dp_extclk)  in radeon_atom_pick_pll()
1964 			else if (ASIC_IS_DCE6(rdev))  in radeon_atom_pick_pll()
1967 			else if (ASIC_IS_DCE5(rdev))  in radeon_atom_pick_pll()
2010 void radeon_atom_disp_eng_pll_init(struct radeon_device *rdev)  in radeon_atom_disp_eng_pll_init()  argument
2013 	if (ASIC_IS_DCE6(rdev))  in radeon_atom_disp_eng_pll_init()
2014 		atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk);  in radeon_atom_disp_eng_pll_init()
2015 	else if (ASIC_IS_DCE4(rdev)) {  in radeon_atom_disp_eng_pll_init()
2017 		bool ss_enabled = radeon_atombios_get_asic_ss_info(rdev, &ss,  in radeon_atom_disp_eng_pll_init()
2019 								   rdev->clock.default_dispclk);  in radeon_atom_disp_eng_pll_init()
2021 			atombios_crtc_program_ss(rdev, ATOM_DISABLE, ATOM_DCPLL, -1, &ss);  in radeon_atom_disp_eng_pll_init()
2023 		atombios_crtc_set_disp_eng_pll(rdev, rdev->clock.default_dispclk);  in radeon_atom_disp_eng_pll_init()
2025 			atombios_crtc_program_ss(rdev, ATOM_ENABLE, ATOM_DCPLL, -1, &ss);  in radeon_atom_disp_eng_pll_init()
2037 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_mode_set()  local
2051 	if (ASIC_IS_DCE4(rdev))  in atombios_crtc_mode_set()
2053 	else if (ASIC_IS_AVIVO(rdev)) {  in atombios_crtc_mode_set()
2118 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_prepare()  local
2121 	if (ASIC_IS_DCE6(rdev))  in atombios_crtc_prepare()
2138 	struct radeon_device *rdev = dev->dev_private;  in atombios_crtc_disable()  local
2159 	if (ASIC_IS_DCE4(rdev))  in atombios_crtc_disable()
2161 	else if (ASIC_IS_AVIVO(rdev))  in atombios_crtc_disable()
2164 	if (ASIC_IS_DCE6(rdev))  in atombios_crtc_disable()
2167 	for (i = 0; i < rdev->num_crtc; i++) {  in atombios_crtc_disable()
2168 		if (rdev->mode_info.crtcs[i] &&  in atombios_crtc_disable()
2169 		    rdev->mode_info.crtcs[i]->enabled &&  in atombios_crtc_disable()
2171 		    radeon_crtc->pll_id == rdev->mode_info.crtcs[i]->pll_id) {  in atombios_crtc_disable()
2188 		if ((rdev->family == CHIP_ARUBA) ||  in atombios_crtc_disable()
2189 		    (rdev->family == CHIP_KAVERI) ||  in atombios_crtc_disable()
2190 		    (rdev->family == CHIP_BONAIRE) ||  in atombios_crtc_disable()
2191 		    (rdev->family == CHIP_HAWAII))  in atombios_crtc_disable()
2220 	struct radeon_device *rdev = dev->dev_private;  in radeon_atombios_init_crtc()  local
2222 	if (ASIC_IS_DCE4(rdev)) {  in radeon_atombios_init_crtc()