Lines Matching refs:args
41 SET_CRTC_OVERSCAN_PS_ALLOCATION args; in atombios_overscan_setup() local
45 memset(&args, 0, sizeof(args)); in atombios_overscan_setup()
47 args.ucCRTC = radeon_crtc->crtc_id; in atombios_overscan_setup()
51 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
52 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in atombios_overscan_setup()
53 args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
54 args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in atombios_overscan_setup()
61 …args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2); in atombios_overscan_setup()
62 …args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2… in atombios_overscan_setup()
64 … args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2); in atombios_overscan_setup()
65 …args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / … in atombios_overscan_setup()
70 args.usOverscanRight = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
71 args.usOverscanLeft = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
72 args.usOverscanBottom = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
73 args.usOverscanTop = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
76 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_overscan_setup()
84 ENABLE_SCALER_PS_ALLOCATION args; in atombios_scaler_setup() local
101 memset(&args, 0, sizeof(args)); in atombios_scaler_setup()
103 args.ucScaler = radeon_crtc->crtc_id; in atombios_scaler_setup()
109 args.ucTVStandard = ATOM_TV_NTSC; in atombios_scaler_setup()
112 args.ucTVStandard = ATOM_TV_PAL; in atombios_scaler_setup()
115 args.ucTVStandard = ATOM_TV_PALM; in atombios_scaler_setup()
118 args.ucTVStandard = ATOM_TV_PAL60; in atombios_scaler_setup()
121 args.ucTVStandard = ATOM_TV_NTSCJ; in atombios_scaler_setup()
124 args.ucTVStandard = ATOM_TV_PAL; /* ??? */ in atombios_scaler_setup()
127 args.ucTVStandard = ATOM_TV_SECAM; in atombios_scaler_setup()
130 args.ucTVStandard = ATOM_TV_PALCN; in atombios_scaler_setup()
133 args.ucEnable = SCALER_ENABLE_MULTITAP_MODE; in atombios_scaler_setup()
135 args.ucTVStandard = ATOM_TV_CV; in atombios_scaler_setup()
136 args.ucEnable = SCALER_ENABLE_MULTITAP_MODE; in atombios_scaler_setup()
140 args.ucEnable = ATOM_SCALER_EXPANSION; in atombios_scaler_setup()
143 args.ucEnable = ATOM_SCALER_CENTER; in atombios_scaler_setup()
146 args.ucEnable = ATOM_SCALER_EXPANSION; in atombios_scaler_setup()
150 args.ucEnable = ATOM_SCALER_DISABLE; in atombios_scaler_setup()
152 args.ucEnable = ATOM_SCALER_CENTER; in atombios_scaler_setup()
156 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_scaler_setup()
170 ENABLE_CRTC_PS_ALLOCATION args; in atombios_lock_crtc() local
172 memset(&args, 0, sizeof(args)); in atombios_lock_crtc()
174 args.ucCRTC = radeon_crtc->crtc_id; in atombios_lock_crtc()
175 args.ucEnable = lock; in atombios_lock_crtc()
177 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_lock_crtc()
186 ENABLE_CRTC_PS_ALLOCATION args; in atombios_enable_crtc() local
188 memset(&args, 0, sizeof(args)); in atombios_enable_crtc()
190 args.ucCRTC = radeon_crtc->crtc_id; in atombios_enable_crtc()
191 args.ucEnable = state; in atombios_enable_crtc()
193 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_enable_crtc()
202 ENABLE_CRTC_PS_ALLOCATION args; in atombios_enable_crtc_memreq() local
204 memset(&args, 0, sizeof(args)); in atombios_enable_crtc_memreq()
206 args.ucCRTC = radeon_crtc->crtc_id; in atombios_enable_crtc_memreq()
207 args.ucEnable = state; in atombios_enable_crtc_memreq()
209 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_enable_crtc_memreq()
228 BLANK_CRTC_PS_ALLOCATION args; in atombios_blank_crtc() local
231 memset(&args, 0, sizeof(args)); in atombios_blank_crtc()
238 args.ucCRTC = radeon_crtc->crtc_id; in atombios_blank_crtc()
239 args.ucBlanking = state; in atombios_blank_crtc()
241 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_blank_crtc()
254 ENABLE_DISP_POWER_GATING_PARAMETERS_V2_1 args; in atombios_powergate_crtc() local
256 memset(&args, 0, sizeof(args)); in atombios_powergate_crtc()
258 args.ucDispPipeId = radeon_crtc->crtc_id; in atombios_powergate_crtc()
259 args.ucEnable = state; in atombios_powergate_crtc()
261 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_powergate_crtc()
303 SET_CRTC_USING_DTD_TIMING_PARAMETERS args; in atombios_set_crtc_dtd_timing() local
307 memset(&args, 0, sizeof(args)); in atombios_set_crtc_dtd_timing()
308 args.usH_Size = cpu_to_le16(mode->crtc_hdisplay - (radeon_crtc->h_border * 2)); in atombios_set_crtc_dtd_timing()
309 args.usH_Blanking_Time = in atombios_set_crtc_dtd_timing()
311 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay - (radeon_crtc->v_border * 2)); in atombios_set_crtc_dtd_timing()
312 args.usV_Blanking_Time = in atombios_set_crtc_dtd_timing()
314 args.usH_SyncOffset = in atombios_set_crtc_dtd_timing()
316 args.usH_SyncWidth = in atombios_set_crtc_dtd_timing()
318 args.usV_SyncOffset = in atombios_set_crtc_dtd_timing()
320 args.usV_SyncWidth = in atombios_set_crtc_dtd_timing()
322 args.ucH_Border = radeon_crtc->h_border; in atombios_set_crtc_dtd_timing()
323 args.ucV_Border = radeon_crtc->v_border; in atombios_set_crtc_dtd_timing()
338 args.susModeMiscInfo.usAccess = cpu_to_le16(misc); in atombios_set_crtc_dtd_timing()
339 args.ucCRTC = radeon_crtc->crtc_id; in atombios_set_crtc_dtd_timing()
341 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_set_crtc_dtd_timing()
350 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION args; in atombios_crtc_set_timing() local
354 memset(&args, 0, sizeof(args)); in atombios_crtc_set_timing()
355 args.usH_Total = cpu_to_le16(mode->crtc_htotal); in atombios_crtc_set_timing()
356 args.usH_Disp = cpu_to_le16(mode->crtc_hdisplay); in atombios_crtc_set_timing()
357 args.usH_SyncStart = cpu_to_le16(mode->crtc_hsync_start); in atombios_crtc_set_timing()
358 args.usH_SyncWidth = in atombios_crtc_set_timing()
360 args.usV_Total = cpu_to_le16(mode->crtc_vtotal); in atombios_crtc_set_timing()
361 args.usV_Disp = cpu_to_le16(mode->crtc_vdisplay); in atombios_crtc_set_timing()
362 args.usV_SyncStart = cpu_to_le16(mode->crtc_vsync_start); in atombios_crtc_set_timing()
363 args.usV_SyncWidth = in atombios_crtc_set_timing()
366 args.ucOverscanRight = radeon_crtc->h_border; in atombios_crtc_set_timing()
367 args.ucOverscanLeft = radeon_crtc->h_border; in atombios_crtc_set_timing()
368 args.ucOverscanBottom = radeon_crtc->v_border; in atombios_crtc_set_timing()
369 args.ucOverscanTop = radeon_crtc->v_border; in atombios_crtc_set_timing()
384 args.susModeMiscInfo.usAccess = cpu_to_le16(misc); in atombios_crtc_set_timing()
385 args.ucCRTC = radeon_crtc->crtc_id; in atombios_crtc_set_timing()
387 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_crtc_set_timing()
446 union atom_enable_ss args; in atombios_crtc_program_ss() local
473 memset(&args, 0, sizeof(args)); in atombios_crtc_program_ss()
476 args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0); in atombios_crtc_program_ss()
477 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
480 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; in atombios_crtc_program_ss()
483 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; in atombios_crtc_program_ss()
486 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; in atombios_crtc_program_ss()
491 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in atombios_crtc_program_ss()
492 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in atombios_crtc_program_ss()
493 args.v3.ucEnable = enable; in atombios_crtc_program_ss()
495 args.v2.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); in atombios_crtc_program_ss()
496 args.v2.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
499 args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P1PLL; in atombios_crtc_program_ss()
502 args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P2PLL; in atombios_crtc_program_ss()
505 args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_DCPLL; in atombios_crtc_program_ss()
510 args.v2.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in atombios_crtc_program_ss()
511 args.v2.usSpreadSpectrumStep = cpu_to_le16(ss->step); in atombios_crtc_program_ss()
512 args.v2.ucEnable = enable; in atombios_crtc_program_ss()
514 args.v1.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); in atombios_crtc_program_ss()
515 args.v1.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
516 args.v1.ucSpreadSpectrumStep = ss->step; in atombios_crtc_program_ss()
517 args.v1.ucSpreadSpectrumDelay = ss->delay; in atombios_crtc_program_ss()
518 args.v1.ucSpreadSpectrumRange = ss->range; in atombios_crtc_program_ss()
519 args.v1.ucPpll = pll_id; in atombios_crtc_program_ss()
520 args.v1.ucEnable = enable; in atombios_crtc_program_ss()
527 args.lvds_ss_2.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); in atombios_crtc_program_ss()
528 args.lvds_ss_2.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
529 args.lvds_ss_2.ucSpreadSpectrumStep = ss->step; in atombios_crtc_program_ss()
530 args.lvds_ss_2.ucSpreadSpectrumDelay = ss->delay; in atombios_crtc_program_ss()
531 args.lvds_ss_2.ucSpreadSpectrumRange = ss->range; in atombios_crtc_program_ss()
532 args.lvds_ss_2.ucEnable = enable; in atombios_crtc_program_ss()
538 args.lvds_ss.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage); in atombios_crtc_program_ss()
539 args.lvds_ss.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
540 args.lvds_ss.ucSpreadSpectrumStepSize_Delay = (ss->step & 3) << 2; in atombios_crtc_program_ss()
541 args.lvds_ss.ucSpreadSpectrumStepSize_Delay |= (ss->delay & 7) << 4; in atombios_crtc_program_ss()
542 args.lvds_ss.ucEnable = enable; in atombios_crtc_program_ss()
544 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_crtc_program_ss()
670 union adjust_pixel_clock args; in atombios_adjust_pll() local
679 memset(&args, 0, sizeof(args)); in atombios_adjust_pll()
686 args.v1.usPixelClock = cpu_to_le16(clock / 10); in atombios_adjust_pll()
687 args.v1.ucTransmitterID = radeon_encoder->encoder_id; in atombios_adjust_pll()
688 args.v1.ucEncodeMode = encoder_mode; in atombios_adjust_pll()
690 args.v1.ucConfig |= in atombios_adjust_pll()
694 index, (uint32_t *)&args); in atombios_adjust_pll()
695 adjusted_clock = le16_to_cpu(args.v1.usPixelClock) * 10; in atombios_adjust_pll()
698 args.v3.sInput.usPixelClock = cpu_to_le16(clock / 10); in atombios_adjust_pll()
699 args.v3.sInput.ucTransmitterID = radeon_encoder->encoder_id; in atombios_adjust_pll()
700 args.v3.sInput.ucEncodeMode = encoder_mode; in atombios_adjust_pll()
701 args.v3.sInput.ucDispPllConfig = 0; in atombios_adjust_pll()
703 args.v3.sInput.ucDispPllConfig |= in atombios_adjust_pll()
706 args.v3.sInput.ucDispPllConfig |= in atombios_adjust_pll()
709 args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10); in atombios_adjust_pll()
713 args.v3.sInput.ucDispPllConfig |= in atombios_adjust_pll()
716 args.v3.sInput.ucDispPllConfig |= in atombios_adjust_pll()
721 args.v3.sInput.ucExtTransmitterID = in atombios_adjust_pll()
724 args.v3.sInput.ucExtTransmitterID = 0; in atombios_adjust_pll()
727 index, (uint32_t *)&args); in atombios_adjust_pll()
728 adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; in atombios_adjust_pll()
729 if (args.v3.sOutput.ucRefDiv) { in atombios_adjust_pll()
732 radeon_crtc->pll_reference_div = args.v3.sOutput.ucRefDiv; in atombios_adjust_pll()
734 if (args.v3.sOutput.ucPostDiv) { in atombios_adjust_pll()
737 radeon_crtc->pll_post_div = args.v3.sOutput.ucPostDiv; in atombios_adjust_pll()
770 union set_pixel_clock args; in atombios_crtc_set_disp_eng_pll() local
772 memset(&args, 0, sizeof(args)); in atombios_crtc_set_disp_eng_pll()
786 args.v5.ucCRTC = ATOM_CRTC_INVALID; in atombios_crtc_set_disp_eng_pll()
787 args.v5.usPixelClock = cpu_to_le16(dispclk); in atombios_crtc_set_disp_eng_pll()
788 args.v5.ucPpll = ATOM_DCPLL; in atombios_crtc_set_disp_eng_pll()
794 args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk); in atombios_crtc_set_disp_eng_pll()
796 args.v6.ucPpll = ATOM_EXT_PLL1; in atombios_crtc_set_disp_eng_pll()
798 args.v6.ucPpll = ATOM_PPLL0; in atombios_crtc_set_disp_eng_pll()
800 args.v6.ucPpll = ATOM_DCPLL; in atombios_crtc_set_disp_eng_pll()
811 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_crtc_set_disp_eng_pll()
832 union set_pixel_clock args; in atombios_crtc_program_pll() local
834 memset(&args, 0, sizeof(args)); in atombios_crtc_program_pll()
846 args.v1.usPixelClock = cpu_to_le16(clock / 10); in atombios_crtc_program_pll()
847 args.v1.usRefDiv = cpu_to_le16(ref_div); in atombios_crtc_program_pll()
848 args.v1.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll()
849 args.v1.ucFracFbDiv = frac_fb_div; in atombios_crtc_program_pll()
850 args.v1.ucPostDiv = post_div; in atombios_crtc_program_pll()
851 args.v1.ucPpll = pll_id; in atombios_crtc_program_pll()
852 args.v1.ucCRTC = crtc_id; in atombios_crtc_program_pll()
853 args.v1.ucRefDivSrc = 1; in atombios_crtc_program_pll()
856 args.v2.usPixelClock = cpu_to_le16(clock / 10); in atombios_crtc_program_pll()
857 args.v2.usRefDiv = cpu_to_le16(ref_div); in atombios_crtc_program_pll()
858 args.v2.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll()
859 args.v2.ucFracFbDiv = frac_fb_div; in atombios_crtc_program_pll()
860 args.v2.ucPostDiv = post_div; in atombios_crtc_program_pll()
861 args.v2.ucPpll = pll_id; in atombios_crtc_program_pll()
862 args.v2.ucCRTC = crtc_id; in atombios_crtc_program_pll()
863 args.v2.ucRefDivSrc = 1; in atombios_crtc_program_pll()
866 args.v3.usPixelClock = cpu_to_le16(clock / 10); in atombios_crtc_program_pll()
867 args.v3.usRefDiv = cpu_to_le16(ref_div); in atombios_crtc_program_pll()
868 args.v3.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll()
869 args.v3.ucFracFbDiv = frac_fb_div; in atombios_crtc_program_pll()
870 args.v3.ucPostDiv = post_div; in atombios_crtc_program_pll()
871 args.v3.ucPpll = pll_id; in atombios_crtc_program_pll()
873 args.v3.ucMiscInfo = PIXEL_CLOCK_MISC_CRTC_SEL_CRTC2; in atombios_crtc_program_pll()
875 args.v3.ucMiscInfo = PIXEL_CLOCK_MISC_CRTC_SEL_CRTC1; in atombios_crtc_program_pll()
877 args.v3.ucMiscInfo |= PIXEL_CLOCK_MISC_REF_DIV_SRC; in atombios_crtc_program_pll()
878 args.v3.ucTransmitterId = encoder_id; in atombios_crtc_program_pll()
879 args.v3.ucEncoderMode = encoder_mode; in atombios_crtc_program_pll()
882 args.v5.ucCRTC = crtc_id; in atombios_crtc_program_pll()
883 args.v5.usPixelClock = cpu_to_le16(clock / 10); in atombios_crtc_program_pll()
884 args.v5.ucRefDiv = ref_div; in atombios_crtc_program_pll()
885 args.v5.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll()
886 args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); in atombios_crtc_program_pll()
887 args.v5.ucPostDiv = post_div; in atombios_crtc_program_pll()
888 args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */ in atombios_crtc_program_pll()
890 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_REF_DIV_SRC; in atombios_crtc_program_pll()
895 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_24BPP; in atombios_crtc_program_pll()
899 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_32BPP; in atombios_crtc_program_pll()
903 args.v5.ucMiscInfo |= PIXEL_CLOCK_V5_MISC_HDMI_30BPP; in atombios_crtc_program_pll()
907 args.v5.ucTransmitterID = encoder_id; in atombios_crtc_program_pll()
908 args.v5.ucEncoderMode = encoder_mode; in atombios_crtc_program_pll()
909 args.v5.ucPpll = pll_id; in atombios_crtc_program_pll()
912 args.v6.ulDispEngClkFreq = cpu_to_le32(crtc_id << 24 | clock / 10); in atombios_crtc_program_pll()
913 args.v6.ucRefDiv = ref_div; in atombios_crtc_program_pll()
914 args.v6.usFbDiv = cpu_to_le16(fb_div); in atombios_crtc_program_pll()
915 args.v6.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); in atombios_crtc_program_pll()
916 args.v6.ucPostDiv = post_div; in atombios_crtc_program_pll()
917 args.v6.ucMiscInfo = 0; /* HDMI depth, etc. */ in atombios_crtc_program_pll()
919 args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_REF_DIV_SRC; in atombios_crtc_program_pll()
924 args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_24BPP; in atombios_crtc_program_pll()
927 args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_30BPP_V6; in atombios_crtc_program_pll()
930 args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_36BPP_V6; in atombios_crtc_program_pll()
933 args.v6.ucMiscInfo |= PIXEL_CLOCK_V6_MISC_HDMI_48BPP; in atombios_crtc_program_pll()
937 args.v6.ucTransmitterID = encoder_id; in atombios_crtc_program_pll()
938 args.v6.ucEncoderMode = encoder_mode; in atombios_crtc_program_pll()
939 args.v6.ucPpll = pll_id; in atombios_crtc_program_pll()
951 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); in atombios_crtc_program_pll()