38 	struct nvkm_bios *bios = subdev->device->bios;  in nv40_ram_calc()
71 	struct nvkm_device *device = subdev->device;  in nv40_ram_prog()  local
72 	struct nvkm_bios *bios = device->bios;  in nv40_ram_prog()
80 		u32 vbl = nvkm_rd32(device, 0x600808 + (i * 0x2000));  in nv40_ram_prog()
83 			if (vbl != nvkm_rd32(device, 0x600808 + (i * 0x2000))) {  in nv40_ram_prog()
84 				nvkm_wr08(device, 0x0c03c4 + (i * 0x2000), 0x01);  in nv40_ram_prog()
85 				sr1[i] = nvkm_rd08(device, 0x0c03c5 + (i * 0x2000));  in nv40_ram_prog()
99 		nvkm_msec(device, 2000,  in nv40_ram_prog()
100 			u32 tmp = nvkm_rd32(device, 0x600808 + (i * 0x2000));  in nv40_ram_prog()
105 		nvkm_msec(device, 2000,  in nv40_ram_prog()
106 			u32 tmp = nvkm_rd32(device, 0x600808 + (i * 0x2000));  in nv40_ram_prog()
111 		nvkm_wr08(device, 0x0c03c4 + (i * 0x2000), 0x01);  in nv40_ram_prog()
112 		nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i] | 0x20);  in nv40_ram_prog()
116 	nvkm_wr32(device, 0x1002d4, 0x00000001); /* precharge */  in nv40_ram_prog()
117 	nvkm_wr32(device, 0x1002d0, 0x00000001); /* refresh */  in nv40_ram_prog()
118 	nvkm_wr32(device, 0x1002d0, 0x00000001); /* refresh */  in nv40_ram_prog()
119 	nvkm_mask(device, 0x100210, 0x80000000, 0x00000000); /* no auto refresh */  in nv40_ram_prog()
120 	nvkm_wr32(device, 0x1002dc, 0x00000001); /* enable self-refresh */  in nv40_ram_prog()
123 	nvkm_mask(device, 0x00c040, 0x0000c000, 0x00000000);  in nv40_ram_prog()
124 	switch (device->chipset) {  in nv40_ram_prog()
130 		nvkm_mask(device, 0x004044, 0xc0771100, ram->ctrl);  in nv40_ram_prog()
131 		nvkm_mask(device, 0x00402c, 0xc0771100, ram->ctrl);  in nv40_ram_prog()
132 		nvkm_wr32(device, 0x004048, ram->coef);  in nv40_ram_prog()
133 		nvkm_wr32(device, 0x004030, ram->coef);  in nv40_ram_prog()
137 		nvkm_mask(device, 0x004038, 0xc0771100, ram->ctrl);  in nv40_ram_prog()
138 		nvkm_wr32(device, 0x00403c, ram->coef);  in nv40_ram_prog()
140 		nvkm_mask(device, 0x004020, 0xc0771100, ram->ctrl);  in nv40_ram_prog()
141 		nvkm_wr32(device, 0x004024, ram->coef);  in nv40_ram_prog()
145 	nvkm_mask(device, 0x00c040, 0x0000c000, 0x0000c000);  in nv40_ram_prog()
148 	nvkm_wr32(device, 0x1002dc, 0x00000000);  in nv40_ram_prog()
149 	nvkm_mask(device, 0x100210, 0x80000000, 0x80000000);  in nv40_ram_prog()
171 		nvkm_msec(device, 2000,  in nv40_ram_prog()
172 			u32 tmp = nvkm_rd32(device, 0x600808 + (i * 0x2000));  in nv40_ram_prog()
177 		nvkm_wr08(device, 0x0c03c4 + (i * 0x2000), 0x01);  in nv40_ram_prog()
178 		nvkm_wr08(device, 0x0c03c5 + (i * 0x2000), sr1[i]);  in nv40_ram_prog()
210 	struct nvkm_device *device = fb->subdev.device;  in nv40_ram_new()  local
211 	u32 pbus1218 = nvkm_rd32(device, 0x001218);  in nv40_ram_new()
212 	u32     size = nvkm_rd32(device, 0x10020c) & 0xff000000;  in nv40_ram_new()
213 	u32     tags = nvkm_rd32(device, 0x100320);  in nv40_ram_new()
228 	(*pram)->parts = (nvkm_rd32(device, 0x100200) & 0x00000003) + 1;  in nv40_ram_new()