39 	struct nvkm_device *device = subdev->device;  in nv04_devinit_meminit()  local
45 	fb = fbmem_init(device);  in nv04_devinit_meminit()
52 	nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) | 0x20);  in nv04_devinit_meminit()
53 	nvkm_mask(device, NV04_PFB_DEBUG_0, 0, NV04_PFB_DEBUG_0_REFRESH_OFF);  in nv04_devinit_meminit()
55 	nvkm_mask(device, NV04_PFB_BOOT_0, ~0,  in nv04_devinit_meminit()
66 		nvkm_mask(device, NV04_PFB_BOOT_0,  in nv04_devinit_meminit()
69 		nvkm_mask(device, NV04_PFB_DEBUG_0,  in nv04_devinit_meminit()
76 			nvkm_mask(device, NV04_PFB_BOOT_0,  in nv04_devinit_meminit()
82 		nvkm_mask(device, NV04_PFB_BOOT_0,  in nv04_devinit_meminit()
89 			nvkm_mask(device, NV04_PFB_BOOT_0,  in nv04_devinit_meminit()
93 			nvkm_mask(device, NV04_PFB_BOOT_0,  in nv04_devinit_meminit()
97 		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_TYPE,  in nv04_devinit_meminit()
101 		nvkm_mask(device, NV04_PFB_BOOT_0, NV04_PFB_BOOT_0_RAM_AMOUNT,  in nv04_devinit_meminit()
107 	nvkm_mask(device, NV04_PFB_DEBUG_0, NV04_PFB_DEBUG_0_REFRESH_OFF, 0);  in nv04_devinit_meminit()
108 	nvkm_wrvgas(device, 0, 1, nvkm_rdvgas(device, 0, 1) & ~0x20);  in nv04_devinit_meminit()
146 	struct nvkm_device *device = init->subdev.device;  in setPLL_single()  local
147 	int chip_version = device->bios->version.chip;  in setPLL_single()
148 	uint32_t oldpll = nvkm_rd32(device, reg);  in setPLL_single()
158 		saved_powerctrl_1 = nvkm_rd32(device, 0x001584);  in setPLL_single()
159 		nvkm_wr32(device, 0x001584,  in setPLL_single()
166 		nvkm_wr32(device, reg, pv->log2P << 16 | (oldpll & 0xffff));  in setPLL_single()
169 		nvkm_wr32(device, reg, (oldpll & 0xffff0000) | pv->NM1);  in setPLL_single()
175 	nvkm_rd32(device, reg);  in setPLL_single()
178 	nvkm_wr32(device, reg, pll);  in setPLL_single()
181 		nvkm_wr32(device, 0x001584, saved_powerctrl_1);  in setPLL_single()
201 	struct nvkm_device *device = init->subdev.device;  in setPLL_double_highregs()  local
202 	int chip_version = device->bios->version.chip;  in setPLL_double_highregs()
205 	uint32_t oldpll1 = nvkm_rd32(device, reg1);  in setPLL_double_highregs()
206 	uint32_t oldpll2 = !nv3035 ? nvkm_rd32(device, reg2) : 0;  in setPLL_double_highregs()
221 		oldramdac580 = nvkm_rd32(device, 0x680580);  in setPLL_double_highregs()
237 		saved_powerctrl_1 = nvkm_rd32(device, 0x001584);  in setPLL_double_highregs()
238 		nvkm_wr32(device, 0x001584,  in setPLL_double_highregs()
257 		savedc040 = nvkm_rd32(device, 0xc040);  in setPLL_double_highregs()
259 			nvkm_wr32(device, 0xc040, savedc040 & ~(3 << shift_c040));  in setPLL_double_highregs()
263 		nvkm_wr32(device, 0x680580, ramdac580);  in setPLL_double_highregs()
266 		nvkm_wr32(device, reg2, pll2);  in setPLL_double_highregs()
267 	nvkm_wr32(device, reg1, pll1);  in setPLL_double_highregs()
270 		nvkm_wr32(device, 0x001584, saved_powerctrl_1);  in setPLL_double_highregs()
272 		nvkm_wr32(device, 0xc040, savedc040);  in setPLL_double_highregs()
286 	struct nvkm_device *device = init->subdev.device;  in setPLL_double_lowregs()  local
289 	uint32_t oldPval = nvkm_rd32(device, Preg);  in setPLL_double_lowregs()
298 	if (nvkm_rd32(device, NMNMreg) == NMNM && (oldPval & 0xc0070000) == Pval)  in setPLL_double_lowregs()
310 		if (nvbios_pll_parse(device->bios, Preg, &info))  in setPLL_double_lowregs()
318 		saved4600 = nvkm_rd32(device, 0x4600);  in setPLL_double_lowregs()
319 		nvkm_wr32(device, 0x4600, saved4600 | 8 << 28);  in setPLL_double_lowregs()
324 	nvkm_wr32(device, Preg, oldPval | 1 << 28);  in setPLL_double_lowregs()
325 	nvkm_wr32(device, Preg, Pval & ~(4 << 28));  in setPLL_double_lowregs()
328 		nvkm_wr32(device, 0x4020, Pval & ~(0xc << 28));  in setPLL_double_lowregs()
329 		nvkm_wr32(device, 0x4038, Pval & ~(0xc << 28));  in setPLL_double_lowregs()
332 	savedc040 = nvkm_rd32(device, 0xc040);  in setPLL_double_lowregs()
333 	nvkm_wr32(device, 0xc040, savedc040 & maskc040);  in setPLL_double_lowregs()
335 	nvkm_wr32(device, NMNMreg, NMNM);  in setPLL_double_lowregs()
337 		nvkm_wr32(device, 0x403c, NMNM);  in setPLL_double_lowregs()
339 	nvkm_wr32(device, Preg, Pval);  in setPLL_double_lowregs()
342 		nvkm_wr32(device, 0x4020, Pval);  in setPLL_double_lowregs()
343 		nvkm_wr32(device, 0x4038, Pval);  in setPLL_double_lowregs()
344 		nvkm_wr32(device, 0x4600, saved4600);  in setPLL_double_lowregs()
347 	nvkm_wr32(device, 0xc040, savedc040);  in setPLL_double_lowregs()
350 		nvkm_wr32(device, 0x4020, Pval & ~(1 << 28));  in setPLL_double_lowregs()
351 		nvkm_wr32(device, 0x4038, Pval & ~(1 << 28));  in setPLL_double_lowregs()
359 	struct nvkm_bios *bios = subdev->device->bios;  in nv04_devinit_pll_set()
404 	struct nvkm_device *device = subdev->device;  in nv04_devinit_preinit()  local
407 	nvkm_mask(device, 0x000200, 0x00000001, 0x00000001);  in nv04_devinit_preinit()
411 		init->owner = nvkm_rdvgaowner(device);  in nv04_devinit_preinit()
412 	nvkm_wrvgaowner(device, 0);  in nv04_devinit_preinit()
415 		u32 htotal = nvkm_rdvgac(device, 0, 0x06);  in nv04_devinit_preinit()
416 		htotal |= (nvkm_rdvgac(device, 0, 0x07) & 0x01) << 8;  in nv04_devinit_preinit()
417 		htotal |= (nvkm_rdvgac(device, 0, 0x07) & 0x20) << 4;  in nv04_devinit_preinit()
418 		htotal |= (nvkm_rdvgac(device, 0, 0x25) & 0x01) << 10;  in nv04_devinit_preinit()
419 		htotal |= (nvkm_rdvgac(device, 0, 0x41) & 0x01) << 11;  in nv04_devinit_preinit()
432 	nvkm_wrvgaowner(init->base.subdev.device, init->owner);  in nv04_devinit_dtor()
438 		  struct nvkm_device *device, int index,  in nv04_devinit_new_()  argument
447 	nvkm_devinit_ctor(func, device, index, &init->base);  in nv04_devinit_new_()
462 nv04_devinit_new(struct nvkm_device *device, int index,  in nv04_devinit_new()  argument
465 	return nv04_devinit_new_(&nv04_devinit, device, index, pinit);  in nv04_devinit_new()