24 #define mcp77_clk(p) container_of((p), struct mcp77_clk, base)
33 	struct nvkm_clk base;  member
44 	struct nvkm_device *device = clk->base.subdev.device;  in read_div()
49 read_pll(struct mcp77_clk *clk, u32 base)  in read_pll()  argument
51 	struct nvkm_device *device = clk->base.subdev.device;  in read_pll()
52 	u32 ctrl = nvkm_rd32(device, base + 0);  in read_pll()
53 	u32 coef = nvkm_rd32(device, base + 4);  in read_pll()
54 	u32 ref = nvkm_clk_read(&clk->base, nv_clk_src_href);  in read_pll()
59 	switch (base){  in read_pll()
81 mcp77_clk_read(struct nvkm_clk *base, enum nv_clk_src src)  in mcp77_clk_read()  argument
83 	struct mcp77_clk *clk = mcp77_clk(base);  in mcp77_clk_read()
84 	struct nvkm_subdev *subdev = &clk->base.subdev;  in mcp77_clk_read()
95 		return nvkm_clk_read(&clk->base, nv_clk_src_href) * 4;  in mcp77_clk_read()
97 		return nvkm_clk_read(&clk->base, nv_clk_src_href) * 2 / 3;  in mcp77_clk_read()
100 		case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm2d3);  in mcp77_clk_read()
102 		case 0x00080000: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4);  in mcp77_clk_read()
103 		case 0x000c0000: return nvkm_clk_read(&clk->base, nv_clk_src_cclk);  in mcp77_clk_read()
110 		case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;  in mcp77_clk_read()
112 		case 0x00000002: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4) >> P;  in mcp77_clk_read()
118 			return nvkm_clk_read(&clk->base, nv_clk_src_core);  in mcp77_clk_read()
121 			return nvkm_clk_read(&clk->base, nv_clk_src_core);  in mcp77_clk_read()
124 		case 0x00000000: return nvkm_clk_read(&clk->base, nv_clk_src_href);  in mcp77_clk_read()
125 		case 0x00000400: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm4);  in mcp77_clk_read()
126 		case 0x00000800: return nvkm_clk_read(&clk->base, nv_clk_src_hclkm2d3);  in mcp77_clk_read()
134 				return nvkm_clk_read(&clk->base, nv_clk_src_href) >> P;  in mcp77_clk_read()
135 			return nvkm_clk_read(&clk->base, nv_clk_src_crystal) >> P;  in mcp77_clk_read()
149 			return nvkm_clk_read(&clk->base, nv_clk_src_core) >> P;  in mcp77_clk_read()
168 	struct nvkm_subdev *subdev = &clk->base.subdev;  in calc_pll()
177 	pll.refclk = nvkm_clk_read(&clk->base, nv_clk_src_href);  in calc_pll()
203 mcp77_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)  in mcp77_clk_calc()  argument
205 	struct mcp77_clk *clk = mcp77_clk(base);  in mcp77_clk_calc()
209 	struct nvkm_subdev *subdev = &clk->base.subdev;  in mcp77_clk_calc()
215 	if (core < nvkm_clk_read(&clk->base, nv_clk_src_hclkm4))  in mcp77_clk_calc()
216 		out = calc_P(nvkm_clk_read(&clk->base, nv_clk_src_hclkm4), core, &divs);  in mcp77_clk_calc()
242 	if (shader == nvkm_clk_read(&clk->base, nv_clk_src_href)) {  in mcp77_clk_calc()
299 mcp77_clk_prog(struct nvkm_clk *base)  in mcp77_clk_prog()  argument
301 	struct mcp77_clk *clk = mcp77_clk(base);  in mcp77_clk_prog()
302 	struct nvkm_subdev *subdev = &clk->base.subdev;  in mcp77_clk_prog()
309 	ret = gt215_clk_pre(&clk->base, f);  in mcp77_clk_prog()
388 	gt215_clk_post(&clk->base, f);  in mcp77_clk_prog()
393 mcp77_clk_tidy(struct nvkm_clk *base)  in mcp77_clk_tidy()  argument
420 	*pclk = &clk->base;  in mcp77_clk_new()
422 	return nvkm_clk_ctor(&mcp77_clk, device, index, true, &clk->base);  in mcp77_clk_new()