Lines Matching refs:offset
41 init->offset, init_exec(init) ? \
363 return bit_I.offset; in init_table()
375 init_table_(struct nvbios_init *init, u16 offset, const char *name) in init_table_() argument
380 if (len >= offset + 2) { in init_table_()
381 data = nvbios_rd16(bios, data + offset); in init_table_()
459 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) in init_xlat_() argument
466 return nvbios_rd08(bios, data + offset); in init_xlat_()
583 u8 opcode = nvbios_rd08(init->bios, init->offset); in init_reserved()
597 cont(" 0x%02x", nvbios_rd08(init->bios, init->offset + i)); in init_reserved()
599 init->offset += length; in init_reserved()
610 init->offset = 0x0000; in init_done()
621 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_prog()
622 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_prog()
623 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_prog()
624 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_prog()
625 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_prog()
626 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_prog()
632 init->offset += 11; in init_io_restrict_prog()
636 u32 data = nvbios_rd32(bios, init->offset); in init_io_restrict_prog()
645 init->offset += 4; in init_io_restrict_prog()
658 u8 count = nvbios_rd08(bios, init->offset + 1); in init_repeat()
662 init->offset += 2; in init_repeat()
664 init->repeat = init->offset; in init_repeat()
665 init->repend = init->offset; in init_repeat()
667 init->offset = init->repeat; in init_repeat()
672 init->offset = init->repend; in init_repeat()
684 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll()
685 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll()
686 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll()
687 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll()
688 s8 iofc = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll()
689 u8 count = nvbios_rd08(bios, init->offset + 7); in init_io_restrict_pll()
690 u32 reg = nvbios_rd32(bios, init->offset + 8); in init_io_restrict_pll()
696 init->offset += 12; in init_io_restrict_pll()
700 u32 freq = nvbios_rd16(bios, init->offset) * 10; in init_io_restrict_pll()
711 init->offset += 2; in init_io_restrict_pll()
724 init->offset += 1; in init_end_repeat()
727 init->repend = init->offset; in init_end_repeat()
728 init->offset = 0; in init_end_repeat()
740 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_copy()
741 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy()
742 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_copy()
743 u16 port = nvbios_rd16(bios, init->offset + 7); in init_copy()
744 u8 index = nvbios_rd08(bios, init->offset + 9); in init_copy()
745 u8 mask = nvbios_rd08(bios, init->offset + 10); in init_copy()
752 init->offset += 11; in init_copy()
767 init->offset += 1; in init_not()
779 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_flag_condition()
782 init->offset += 2; in init_io_flag_condition()
797 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_dp_condition()
798 u8 unkn = nvbios_rd08(bios, init->offset + 2); in init_dp_condition()
803 init->offset += 3; in init_dp_condition()
844 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_mask_or()
849 init->offset += 2; in init_io_mask_or()
863 u8 index = nvbios_rd08(bios, init->offset + 1); in init_io_or()
868 init->offset += 2; in init_io_or()
882 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_andn_reg()
883 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_andn_reg()
886 init->offset += 9; in init_andn_reg()
899 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_or_reg()
900 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_or_reg()
903 init->offset += 9; in init_or_reg()
916 u32 creg = nvbios_rd32(bios, init->offset + 1); in init_idx_addr_latched()
917 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_idx_addr_latched()
918 u32 mask = nvbios_rd32(bios, init->offset + 9); in init_idx_addr_latched()
919 u32 data = nvbios_rd32(bios, init->offset + 13); in init_idx_addr_latched()
920 u8 count = nvbios_rd08(bios, init->offset + 17); in init_idx_addr_latched()
924 init->offset += 18; in init_idx_addr_latched()
927 u8 iaddr = nvbios_rd08(bios, init->offset + 0); in init_idx_addr_latched()
928 u8 idata = nvbios_rd08(bios, init->offset + 1); in init_idx_addr_latched()
931 init->offset += 2; in init_idx_addr_latched()
946 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io_restrict_pll2()
947 u8 index = nvbios_rd08(bios, init->offset + 3); in init_io_restrict_pll2()
948 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_io_restrict_pll2()
949 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_io_restrict_pll2()
950 u8 count = nvbios_rd08(bios, init->offset + 6); in init_io_restrict_pll2()
951 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_pll2()
957 init->offset += 11; in init_io_restrict_pll2()
961 u32 freq = nvbios_rd32(bios, init->offset); in init_io_restrict_pll2()
968 init->offset += 4; in init_io_restrict_pll2()
981 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll2()
982 u32 freq = nvbios_rd32(bios, init->offset + 5); in init_pll2()
985 init->offset += 9; in init_pll2()
998 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
999 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_byte()
1000 u8 count = nvbios_rd08(bios, init->offset + 3); in init_i2c_byte()
1003 init->offset += 4; in init_i2c_byte()
1006 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_i2c_byte()
1007 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_i2c_byte()
1008 u8 data = nvbios_rd08(bios, init->offset + 2); in init_i2c_byte()
1012 init->offset += 3; in init_i2c_byte()
1029 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1030 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c_byte()
1031 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c_byte()
1034 init->offset += 4; in init_zm_i2c_byte()
1037 u8 reg = nvbios_rd08(bios, init->offset + 0); in init_zm_i2c_byte()
1038 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c_byte()
1041 init->offset += 2; in init_zm_i2c_byte()
1055 u8 index = nvbios_rd08(bios, init->offset + 1); in init_zm_i2c()
1056 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_zm_i2c()
1057 u8 count = nvbios_rd08(bios, init->offset + 3); in init_zm_i2c()
1061 init->offset += 4; in init_zm_i2c()
1064 data[i] = nvbios_rd08(bios, init->offset); in init_zm_i2c()
1066 init->offset++; in init_zm_i2c()
1089 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_tmds()
1090 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_tmds()
1091 u8 mask = nvbios_rd08(bios, init->offset + 3); in init_tmds()
1092 u8 data = nvbios_rd08(bios, init->offset + 4); in init_tmds()
1097 init->offset += 5; in init_tmds()
1115 u8 tmds = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1116 u8 count = nvbios_rd08(bios, init->offset + 2); in init_zm_tmds_group()
1120 init->offset += 3; in init_zm_tmds_group()
1123 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_tmds_group()
1124 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_tmds_group()
1127 init->offset += 2; in init_zm_tmds_group()
1142 u8 addr0 = nvbios_rd08(bios, init->offset + 1); in init_cr_idx_adr_latch()
1143 u8 addr1 = nvbios_rd08(bios, init->offset + 2); in init_cr_idx_adr_latch()
1144 u8 base = nvbios_rd08(bios, init->offset + 3); in init_cr_idx_adr_latch()
1145 u8 count = nvbios_rd08(bios, init->offset + 4); in init_cr_idx_adr_latch()
1149 init->offset += 5; in init_cr_idx_adr_latch()
1153 u8 data = nvbios_rd08(bios, init->offset); in init_cr_idx_adr_latch()
1156 init->offset += 1; in init_cr_idx_adr_latch()
1172 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_cr()
1173 u8 mask = nvbios_rd08(bios, init->offset + 2); in init_cr()
1174 u8 data = nvbios_rd08(bios, init->offset + 3); in init_cr()
1178 init->offset += 4; in init_cr()
1192 u8 addr = nvbios_rd08(bios, init->offset + 1); in init_zm_cr()
1193 u8 data = nvbios_rd08(bios, init->offset + 2); in init_zm_cr()
1196 init->offset += 3; in init_zm_cr()
1209 u8 count = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1212 init->offset += 2; in init_zm_cr_group()
1215 u8 addr = nvbios_rd08(bios, init->offset + 0); in init_zm_cr_group()
1216 u8 data = nvbios_rd08(bios, init->offset + 1); in init_zm_cr_group()
1219 init->offset += 2; in init_zm_cr_group()
1233 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition_time()
1234 u8 retry = nvbios_rd08(bios, init->offset + 2); in init_condition_time()
1238 init->offset += 3; in init_condition_time()
1260 u16 msec = nvbios_rd16(bios, init->offset + 1); in init_ltime()
1263 init->offset += 3; in init_ltime()
1277 u32 base = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_sequence()
1278 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_sequence()
1281 init->offset += 6; in init_zm_reg_sequence()
1284 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_sequence()
1287 init->offset += 4; in init_zm_reg_sequence()
1302 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll_indirect()
1303 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_pll_indirect()
1308 init->offset += 7; in init_pll_indirect()
1321 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_indirect()
1322 u16 addr = nvbios_rd16(bios, init->offset + 5); in init_zm_reg_indirect()
1327 init->offset += 7; in init_zm_reg_indirect()
1340 u16 addr = nvbios_rd16(bios, init->offset + 1); in init_sub_direct()
1346 save = init->offset; in init_sub_direct()
1347 init->offset = addr; in init_sub_direct()
1352 init->offset = save; in init_sub_direct()
1355 init->offset += 3; in init_sub_direct()
1366 u16 offset = nvbios_rd16(bios, init->offset + 1); in init_jump() local
1368 trace("JUMP\t0x%04x\n", offset); in init_jump()
1371 init->offset = offset; in init_jump()
1373 init->offset += 3; in init_jump()
1384 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_if()
1385 u8 addr = nvbios_rd08(bios, init->offset + 2); in init_i2c_if()
1386 u8 reg = nvbios_rd08(bios, init->offset + 3); in init_i2c_if()
1387 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_i2c_if()
1388 u8 data = nvbios_rd08(bios, init->offset + 5); in init_i2c_if()
1393 init->offset += 6; in init_i2c_if()
1411 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_nv_reg()
1412 u8 shift = nvbios_rd08(bios, init->offset + 5); in init_copy_nv_reg()
1413 u32 smask = nvbios_rd32(bios, init->offset + 6); in init_copy_nv_reg()
1414 u32 sxor = nvbios_rd32(bios, init->offset + 10); in init_copy_nv_reg()
1415 u32 dreg = nvbios_rd32(bios, init->offset + 14); in init_copy_nv_reg()
1416 u32 dmask = nvbios_rd32(bios, init->offset + 18); in init_copy_nv_reg()
1423 init->offset += 22; in init_copy_nv_reg()
1437 u16 port = nvbios_rd16(bios, init->offset + 1); in init_zm_index_io()
1438 u8 index = nvbios_rd08(bios, init->offset + 3); in init_zm_index_io()
1439 u8 data = nvbios_rd08(bios, init->offset + 4); in init_zm_index_io()
1442 init->offset += 5; in init_zm_index_io()
1457 init->offset += 1; in init_compute_mem()
1473 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_reset()
1474 u32 data1 = nvbios_rd32(bios, init->offset + 5); in init_reset()
1475 u32 data2 = nvbios_rd32(bios, init->offset + 9); in init_reset()
1479 init->offset += 13; in init_reset()
1513 init->offset += 1; in init_configure_mem()
1562 init->offset += 1; in init_configure_clk()
1596 init->offset += 1; in init_configure_preinit()
1619 u16 port = nvbios_rd16(bios, init->offset + 1); in init_io()
1620 u8 mask = nvbios_rd16(bios, init->offset + 3); in init_io()
1621 u8 data = nvbios_rd16(bios, init->offset + 4); in init_io()
1625 init->offset += 5; in init_io()
1659 u8 index = nvbios_rd08(bios, init->offset + 1); in init_sub()
1666 save = init->offset; in init_sub()
1667 init->offset = addr; in init_sub()
1672 init->offset = save; in init_sub()
1675 init->offset += 2; in init_sub()
1686 u8 mask = nvbios_rd08(bios, init->offset + 1); in init_ram_condition()
1687 u8 value = nvbios_rd08(bios, init->offset + 2); in init_ram_condition()
1691 init->offset += 3; in init_ram_condition()
1705 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_nv_reg()
1706 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_nv_reg()
1707 u32 data = nvbios_rd32(bios, init->offset + 9); in init_nv_reg()
1710 init->offset += 13; in init_nv_reg()
1723 u8 macro = nvbios_rd08(bios, init->offset + 1); in init_macro()
1736 init->offset += 2; in init_macro()
1747 init->offset += 1; in init_resume()
1759 u32 mask = nvbios_rd32(bios, init->offset + 1); in init_strap_condition()
1760 u32 value = nvbios_rd32(bios, init->offset + 5); in init_strap_condition()
1763 init->offset += 9; in init_strap_condition()
1777 u16 usec = nvbios_rd16(bios, init->offset + 1); in init_time()
1780 init->offset += 3; in init_time()
1798 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_condition()
1801 init->offset += 2; in init_condition()
1815 u8 cond = nvbios_rd08(bios, init->offset + 1); in init_io_condition()
1818 init->offset += 2; in init_io_condition()
1832 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg16()
1833 u16 data = nvbios_rd16(bios, init->offset + 5); in init_zm_reg16()
1836 init->offset += 7; in init_zm_reg16()
1849 u16 port = nvbios_rd16(bios, init->offset + 1); in init_index_io()
1850 u8 index = nvbios_rd16(bios, init->offset + 3); in init_index_io()
1851 u8 mask = nvbios_rd08(bios, init->offset + 4); in init_index_io()
1852 u8 data = nvbios_rd08(bios, init->offset + 5); in init_index_io()
1857 init->offset += 6; in init_index_io()
1871 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_pll()
1872 u32 freq = nvbios_rd16(bios, init->offset + 5) * 10; in init_pll()
1875 init->offset += 7; in init_pll()
1888 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg()
1889 u32 data = nvbios_rd32(bios, init->offset + 5); in init_zm_reg()
1892 init->offset += 9; in init_zm_reg()
1908 u8 type = nvbios_rd08(bios, init->offset + 1); in init_ram_restrict_pll()
1914 init->offset += 2; in init_ram_restrict_pll()
1917 u32 freq = nvbios_rd32(bios, init->offset); in init_ram_restrict_pll()
1926 init->offset += 4; in init_ram_restrict_pll()
1940 init->offset += 1; in init_gpio()
1954 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_ram_restrict_zm_reg_group()
1955 u8 incr = nvbios_rd08(bios, init->offset + 5); in init_ram_restrict_zm_reg_group()
1956 u8 num = nvbios_rd08(bios, init->offset + 6); in init_ram_restrict_zm_reg_group()
1963 init->offset += 7; in init_ram_restrict_zm_reg_group()
1968 u32 data = nvbios_rd32(bios, init->offset); in init_ram_restrict_zm_reg_group()
1977 init->offset += 4; in init_ram_restrict_zm_reg_group()
1992 u32 sreg = nvbios_rd32(bios, init->offset + 1); in init_copy_zm_reg()
1993 u32 dreg = nvbios_rd32(bios, init->offset + 5); in init_copy_zm_reg()
1996 init->offset += 9; in init_copy_zm_reg()
2009 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_reg_group()
2010 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_reg_group()
2013 init->offset += 6; in init_zm_reg_group()
2016 u32 data = nvbios_rd32(bios, init->offset); in init_zm_reg_group()
2019 init->offset += 4; in init_zm_reg_group()
2031 u32 saddr = nvbios_rd32(bios, init->offset + 1); in init_xlat()
2032 u8 sshift = nvbios_rd08(bios, init->offset + 5); in init_xlat()
2033 u8 smask = nvbios_rd08(bios, init->offset + 6); in init_xlat()
2034 u8 index = nvbios_rd08(bios, init->offset + 7); in init_xlat()
2035 u32 daddr = nvbios_rd32(bios, init->offset + 8); in init_xlat()
2036 u32 dmask = nvbios_rd32(bios, init->offset + 12); in init_xlat()
2037 u8 shift = nvbios_rd08(bios, init->offset + 16); in init_xlat()
2044 init->offset += 17; in init_xlat()
2059 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_mask_add()
2060 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_zm_mask_add()
2061 u32 add = nvbios_rd32(bios, init->offset + 9); in init_zm_mask_add()
2065 init->offset += 13; in init_zm_mask_add()
2080 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_auxch()
2081 u8 count = nvbios_rd08(bios, init->offset + 5); in init_auxch()
2084 init->offset += 6; in init_auxch()
2087 u8 mask = nvbios_rd08(bios, init->offset + 0); in init_auxch()
2088 u8 data = nvbios_rd08(bios, init->offset + 1); in init_auxch()
2092 init->offset += 2; in init_auxch()
2104 u32 addr = nvbios_rd32(bios, init->offset + 1); in init_zm_auxch()
2105 u8 count = nvbios_rd08(bios, init->offset + 5); in init_zm_auxch()
2108 init->offset += 6; in init_zm_auxch()
2111 u8 data = nvbios_rd08(bios, init->offset + 0); in init_zm_auxch()
2114 init->offset += 1; in init_zm_auxch()
2126 u8 index = nvbios_rd08(bios, init->offset + 1); in init_i2c_long_if()
2127 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; in init_i2c_long_if()
2128 u8 reglo = nvbios_rd08(bios, init->offset + 3); in init_i2c_long_if()
2129 u8 reghi = nvbios_rd08(bios, init->offset + 4); in init_i2c_long_if()
2130 u8 mask = nvbios_rd08(bios, init->offset + 5); in init_i2c_long_if()
2131 u8 data = nvbios_rd08(bios, init->offset + 6); in init_i2c_long_if()
2137 init->offset += 7; in init_i2c_long_if()
2167 u8 count = nvbios_rd08(bios, init->offset + 1); in init_gpio_ne()
2172 init->offset += 2; in init_gpio_ne()
2174 for (i = init->offset; i < init->offset + count; i++) in init_gpio_ne()
2180 for (i = init->offset; i < init->offset + count; i++) { in init_gpio_ne()
2186 if (i == (init->offset + count)) { in init_gpio_ne()
2195 init->offset += count; in init_gpio_ne()
2278 while (init->offset) { in nvbios_exec()
2279 u8 opcode = nvbios_rd08(init->bios, init->offset); in nvbios_exec()
2305 .offset = data, in nvbios_init()
2321 .offset = data, in nvbios_init()