36 	return nvkm_rd32(gr->engine.subdev.device, 0x1540);  in nv40_gr_units()
47 	int ret = nvkm_gpuobj_new(object->engine->subdev.device, 20, align,  in nv40_gr_object_bind()
79 	int ret = nvkm_gpuobj_new(gr->base.engine.subdev.device, gr->size,  in nv40_gr_chan_bind()
84 		nv40_grctx_fill(gr->base.engine.subdev.device, *pgpuobj);  in nv40_gr_chan_bind()
96 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv40_gr_chan_fini()
134 	spin_lock_irqsave(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_dtor()
136 	spin_unlock_irqrestore(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_dtor()
162 	spin_lock_irqsave(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_new()
164 	spin_unlock_irqrestore(&chan->gr->base.engine.lock, flags);  in nv40_gr_chan_new()
176 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv40_gr_tile()
236 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv40_gr_intr()
251 	spin_lock_irqsave(&gr->base.engine.lock, flags);  in nv40_gr_intr()
283 	spin_unlock_irqrestore(&gr->base.engine.lock, flags);  in nv40_gr_intr()
290 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv40_gr_init()