433 	struct nvkm_device *device = chan->object.engine->subdev.device;  in nv17_gr_mthd_lma_window()
506 	struct nvkm_device *device = chan->object.engine->subdev.device;  in nv17_gr_mthd_lma_enable()
549 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_channel()
564 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_save_pipe()
583 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_load_pipe()
633 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv10_gr_create_pipe()  local
646 			nvkm_error(subdev, "incomplete pipe init for 0x%x :  %p/%p\n", \  in nv10_gr_create_pipe()
788 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv10_gr_ctx_regs_find_offset()  local
794 	nvkm_error(subdev, "unknown offset nv10_ctx_regs %d\n", reg);  in nv10_gr_ctx_regs_find_offset()
801 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv17_gr_ctx_regs_find_offset()  local
807 	nvkm_error(subdev, "unknown offset nv17_ctx_regs %d\n", reg);  in nv17_gr_ctx_regs_find_offset()
815 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_load_dma_vtxbuf()
886 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_load_context()
913 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_unload_context()
934 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_context_switch()
958 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_chan_fini()
1007 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_chan_new()
1052 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_tile()
1084 	struct nvkm_subdev *subdev = &gr->base.engine.subdev;  in nv10_gr_intr()  local
1085 	struct nvkm_device *device = subdev->device;  in nv10_gr_intr()
1124 		nvkm_error(subdev, "intr %08x [%s] nsource %08x [%s] "  in nv10_gr_intr()
1139 	struct nvkm_device *device = gr->base.engine.subdev.device;  in nv10_gr_init()