922 	u32 stat = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x0508));  in gf100_gr_trap_tpc()  local
924 	if (stat & 0x00000001) {  in gf100_gr_trap_tpc()
928 		stat &= ~0x00000001;  in gf100_gr_trap_tpc()
931 	if (stat & 0x00000002) {  in gf100_gr_trap_tpc()
933 		stat &= ~0x00000002;  in gf100_gr_trap_tpc()
936 	if (stat & 0x00000004) {  in gf100_gr_trap_tpc()
940 		stat &= ~0x00000004;  in gf100_gr_trap_tpc()
943 	if (stat & 0x00000008) {  in gf100_gr_trap_tpc()
947 		stat &= ~0x00000008;  in gf100_gr_trap_tpc()
950 	if (stat) {  in gf100_gr_trap_tpc()
951 		nvkm_error(subdev, "GPC%d/TPC%d/%08x: unknown\n", gpc, tpc, stat);  in gf100_gr_trap_tpc()
960 	u32 stat = nvkm_rd32(device, GPC_UNIT(gpc, 0x2c90));  in gf100_gr_trap_gpc()  local
963 	if (stat & 0x00000001) {  in gf100_gr_trap_gpc()
965 		stat &= ~0x00000001;  in gf100_gr_trap_gpc()
968 	if (stat & 0x00000002) {  in gf100_gr_trap_gpc()
972 		stat &= ~0x00000002;  in gf100_gr_trap_gpc()
975 	if (stat & 0x00000004) {  in gf100_gr_trap_gpc()
979 		stat &= ~0x00000004;  in gf100_gr_trap_gpc()
982 	if (stat & 0x00000008) {  in gf100_gr_trap_gpc()
986 		stat &= ~0x00000009;  in gf100_gr_trap_gpc()
991 		if (stat & mask) {  in gf100_gr_trap_gpc()
994 			stat &= ~mask;  in gf100_gr_trap_gpc()
998 	if (stat) {  in gf100_gr_trap_gpc()
999 		nvkm_error(subdev, "GPC%d/%08x: unknown\n", gpc, stat);  in gf100_gr_trap_gpc()
1012 		u32 stat = nvkm_rd32(device, 0x404000);  in gf100_gr_trap_intr()  local
1013 		nvkm_error(subdev, "DISPATCH %08x\n", stat);  in gf100_gr_trap_intr()
1020 		u32 stat = nvkm_rd32(device, 0x404600);  in gf100_gr_trap_intr()  local
1021 		nvkm_error(subdev, "M2MF %08x\n", stat);  in gf100_gr_trap_intr()
1028 		u32 stat = nvkm_rd32(device, 0x408030);  in gf100_gr_trap_intr()  local
1029 		nvkm_error(subdev, "CCACHE %08x\n", stat);  in gf100_gr_trap_intr()
1036 		u32 stat = nvkm_rd32(device, 0x405840);  in gf100_gr_trap_intr()  local
1037 		nvkm_error(subdev, "SHADER %08x\n", stat);  in gf100_gr_trap_intr()
1044 		u32 stat = nvkm_rd32(device, 0x40601c);  in gf100_gr_trap_intr()  local
1045 		nvkm_error(subdev, "UNK6 %08x\n", stat);  in gf100_gr_trap_intr()
1052 		u32 stat = nvkm_rd32(device, 0x404490);  in gf100_gr_trap_intr()  local
1053 		nvkm_error(subdev, "MACRO %08x\n", stat);  in gf100_gr_trap_intr()
1060 		u32 stat = nvkm_rd32(device, 0x407020) & 0x3fffffff;  in gf100_gr_trap_intr()  local
1063 		nvkm_snprintbf(sked, sizeof(sked), gk104_sked_error, stat);  in gf100_gr_trap_intr()
1064 		nvkm_error(subdev, "SKED: %08x [%s]\n", stat, sked);  in gf100_gr_trap_intr()
1066 		if (stat)  in gf100_gr_trap_intr()
1073 		u32 stat = nvkm_rd32(device, 0x400118);  in gf100_gr_trap_intr()  local
1074 		for (gpc = 0; stat && gpc < gr->gpc_nr; gpc++) {  in gf100_gr_trap_intr()
1076 			if (stat & mask) {  in gf100_gr_trap_intr()
1079 				stat &= ~mask;  in gf100_gr_trap_intr()
1141 	u32 stat = nvkm_rd32(device, 0x409c18);  in gf100_gr_ctxctl_isr()  local
1143 	if (stat & 0x00000001) {  in gf100_gr_ctxctl_isr()
1157 			stat &= ~0x00000001;  in gf100_gr_ctxctl_isr()
1163 	if (stat & 0x00080000) {  in gf100_gr_ctxctl_isr()
1167 		stat &= ~0x00080000;  in gf100_gr_ctxctl_isr()
1170 	if (stat) {  in gf100_gr_ctxctl_isr()
1171 		nvkm_error(subdev, "FECS %08x\n", stat);  in gf100_gr_ctxctl_isr()
1173 		nvkm_wr32(device, 0x409c20, stat);  in gf100_gr_ctxctl_isr()
1186 	u32 stat = nvkm_rd32(device, 0x400100);  in gf100_gr_intr()  local
1207 	if (stat & 0x00000001) {  in gf100_gr_intr()
1213 		stat &= ~0x00000001;  in gf100_gr_intr()
1216 	if (stat & 0x00000010) {  in gf100_gr_intr()
1224 		stat &= ~0x00000010;  in gf100_gr_intr()
1227 	if (stat & 0x00000020) {  in gf100_gr_intr()
1232 		stat &= ~0x00000020;  in gf100_gr_intr()
1235 	if (stat & 0x00100000) {  in gf100_gr_intr()
1243 		stat &= ~0x00100000;  in gf100_gr_intr()
1246 	if (stat & 0x00200000) {  in gf100_gr_intr()
1251 		stat &= ~0x00200000;  in gf100_gr_intr()
1254 	if (stat & 0x00080000) {  in gf100_gr_intr()
1257 		stat &= ~0x00080000;  in gf100_gr_intr()
1260 	if (stat) {  in gf100_gr_intr()
1261 		nvkm_error(subdev, "intr %08x\n", stat);  in gf100_gr_intr()
1262 		nvkm_wr32(device, 0x400100, stat);  in gf100_gr_intr()