Lines Matching refs:device
38 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_uevent_init() local
39 nvkm_mask(device, 0x002140, 0x80000000, 0x80000000); in gf100_fifo_uevent_init()
45 struct nvkm_device *device = fifo->engine.subdev.device; in gf100_fifo_uevent_fini() local
46 nvkm_mask(device, 0x002140, 0x80000000, 0x00000000); in gf100_fifo_uevent_fini()
54 struct nvkm_device *device = subdev->device; in gf100_fifo_runlist_update() local
70 nvkm_wr32(device, 0x002270, nvkm_memory_addr(cur) >> 12); in gf100_fifo_runlist_update()
71 nvkm_wr32(device, 0x002274, 0x01f00000 | nr); in gf100_fifo_runlist_update()
74 !(nvkm_rd32(device, 0x00227c) & 0x00100000), in gf100_fifo_runlist_update()
100 struct nvkm_device *device = fifo->base.engine.subdev.device; in gf100_fifo_engine() local
113 return nvkm_device_engine(device, engn); in gf100_fifo_engine()
120 struct nvkm_device *device = fifo->base.engine.subdev.device; in gf100_fifo_recover_work() local
133 nvkm_mask(device, 0x002630, engm, engm); in gf100_fifo_recover_work()
136 if ((engine = nvkm_device_engine(device, engn))) { in gf100_fifo_recover_work()
143 nvkm_wr32(device, 0x00262c, engm); in gf100_fifo_recover_work()
144 nvkm_mask(device, 0x002630, engm, 0x00000000); in gf100_fifo_recover_work()
152 struct nvkm_device *device = subdev->device; in gf100_fifo_recover() local
159 nvkm_mask(device, 0x003004 + (chid * 0x08), 0x00000001, 0x00000000); in gf100_fifo_recover()
176 struct nvkm_device *device = fifo->base.engine.subdev.device; in gf100_fifo_intr_sched_ctxsw() local
184 u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x04)); in gf100_fifo_intr_sched_ctxsw()
211 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_sched() local
212 u32 intr = nvkm_rd32(device, 0x00254c); in gf100_fifo_intr_sched()
292 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_fault() local
293 u32 inst = nvkm_rd32(device, 0x002800 + (unit * 0x10)); in gf100_fifo_intr_fault()
294 u32 valo = nvkm_rd32(device, 0x002804 + (unit * 0x10)); in gf100_fifo_intr_fault()
295 u32 vahi = nvkm_rd32(device, 0x002808 + (unit * 0x10)); in gf100_fifo_intr_fault()
296 u32 stat = nvkm_rd32(device, 0x00280c + (unit * 0x10)); in gf100_fifo_intr_fault()
320 nvkm_mask(device, 0x001704, 0x00000000, 0x00000000); in gf100_fifo_intr_fault()
323 nvkm_mask(device, 0x001714, 0x00000000, 0x00000000); in gf100_fifo_intr_fault()
326 nvkm_mask(device, 0x001718, 0x00000000, 0x00000000); in gf100_fifo_intr_fault()
329 engine = nvkm_device_engine(device, eu->data2); in gf100_fifo_intr_fault()
362 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_pbdma() local
363 u32 stat = nvkm_rd32(device, 0x040108 + (unit * 0x2000)); in gf100_fifo_intr_pbdma()
364 u32 addr = nvkm_rd32(device, 0x0400c0 + (unit * 0x2000)); in gf100_fifo_intr_pbdma()
365 u32 data = nvkm_rd32(device, 0x0400c4 + (unit * 0x2000)); in gf100_fifo_intr_pbdma()
366 u32 chid = nvkm_rd32(device, 0x040120 + (unit * 0x2000)) & 0x7f; in gf100_fifo_intr_pbdma()
375 if (device->sw) { in gf100_fifo_intr_pbdma()
376 if (nvkm_sw_mthd(device->sw, chid, subc, mthd, data)) in gf100_fifo_intr_pbdma()
392 nvkm_wr32(device, 0x0400c0 + (unit * 0x2000), 0x80600008); in gf100_fifo_intr_pbdma()
393 nvkm_wr32(device, 0x040108 + (unit * 0x2000), stat); in gf100_fifo_intr_pbdma()
400 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_runlist() local
401 u32 intr = nvkm_rd32(device, 0x002a00); in gf100_fifo_intr_runlist()
405 nvkm_wr32(device, 0x002a00, 0x10000000); in gf100_fifo_intr_runlist()
411 nvkm_wr32(device, 0x002a00, intr); in gf100_fifo_intr_runlist()
419 struct nvkm_device *device = subdev->device; in gf100_fifo_intr_engine_unit() local
420 u32 intr = nvkm_rd32(device, 0x0025a8 + (engn * 0x04)); in gf100_fifo_intr_engine_unit()
421 u32 inte = nvkm_rd32(device, 0x002628); in gf100_fifo_intr_engine_unit()
424 nvkm_wr32(device, 0x0025a8 + (engn * 0x04), intr); in gf100_fifo_intr_engine_unit()
435 nvkm_mask(device, 0x002628, ints, 0); in gf100_fifo_intr_engine_unit()
443 struct nvkm_device *device = fifo->base.engine.subdev.device; in gf100_fifo_intr_engine() local
444 u32 mask = nvkm_rd32(device, 0x0025a4); in gf100_fifo_intr_engine()
457 struct nvkm_device *device = subdev->device; in gf100_fifo_intr() local
458 u32 mask = nvkm_rd32(device, 0x002140); in gf100_fifo_intr()
459 u32 stat = nvkm_rd32(device, 0x002100) & mask; in gf100_fifo_intr()
462 u32 intr = nvkm_rd32(device, 0x00252c); in gf100_fifo_intr()
464 nvkm_wr32(device, 0x002100, 0x00000001); in gf100_fifo_intr()
470 nvkm_wr32(device, 0x002100, 0x00000100); in gf100_fifo_intr()
475 u32 intr = nvkm_rd32(device, 0x00256c); in gf100_fifo_intr()
477 nvkm_wr32(device, 0x002100, 0x00010000); in gf100_fifo_intr()
482 u32 intr = nvkm_rd32(device, 0x00258c); in gf100_fifo_intr()
484 nvkm_wr32(device, 0x002100, 0x01000000); in gf100_fifo_intr()
489 u32 mask = nvkm_rd32(device, 0x00259c); in gf100_fifo_intr()
493 nvkm_wr32(device, 0x00259c, (1 << unit)); in gf100_fifo_intr()
500 u32 mask = nvkm_rd32(device, 0x0025a0); in gf100_fifo_intr()
504 nvkm_wr32(device, 0x0025a0, (1 << unit)); in gf100_fifo_intr()
522 nvkm_mask(device, 0x002140, stat, 0x00000000); in gf100_fifo_intr()
523 nvkm_wr32(device, 0x002100, stat); in gf100_fifo_intr()
531 struct nvkm_device *device = fifo->base.engine.subdev.device; in gf100_fifo_oneinit() local
534 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x1000, in gf100_fifo_oneinit()
539 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x1000, 0x1000, in gf100_fifo_oneinit()
546 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 128 * 0x1000, in gf100_fifo_oneinit()
551 ret = nvkm_bar_umap(device->bar, 128 * 0x1000, 12, &fifo->user.bar); in gf100_fifo_oneinit()
571 struct nvkm_device *device = subdev->device; in gf100_fifo_init() local
574 nvkm_wr32(device, 0x000204, 0xffffffff); in gf100_fifo_init()
575 nvkm_wr32(device, 0x002204, 0xffffffff); in gf100_fifo_init()
577 fifo->spoon_nr = hweight32(nvkm_rd32(device, 0x002204)); in gf100_fifo_init()
582 nvkm_wr32(device, 0x002208, ~(1 << 0)); /* PGRAPH */ in gf100_fifo_init()
583 nvkm_wr32(device, 0x00220c, ~(1 << 1)); /* PVP */ in gf100_fifo_init()
584 nvkm_wr32(device, 0x002210, ~(1 << 1)); /* PMSPP */ in gf100_fifo_init()
585 nvkm_wr32(device, 0x002214, ~(1 << 1)); /* PMSVLD */ in gf100_fifo_init()
586 nvkm_wr32(device, 0x002218, ~(1 << 2)); /* PCE0 */ in gf100_fifo_init()
587 nvkm_wr32(device, 0x00221c, ~(1 << 1)); /* PCE1 */ in gf100_fifo_init()
592 nvkm_mask(device, 0x04013c + (i * 0x2000), 0x10000100, 0x00000000); in gf100_fifo_init()
593 nvkm_wr32(device, 0x040108 + (i * 0x2000), 0xffffffff); /* INTR */ in gf100_fifo_init()
594 nvkm_wr32(device, 0x04010c + (i * 0x2000), 0xfffffeff); /* INTREN */ in gf100_fifo_init()
597 nvkm_mask(device, 0x002200, 0x00000001, 0x00000001); in gf100_fifo_init()
598 nvkm_wr32(device, 0x002254, 0x10000000 | fifo->user.bar.offset >> 12); in gf100_fifo_init()
600 nvkm_wr32(device, 0x002100, 0xffffffff); in gf100_fifo_init()
601 nvkm_wr32(device, 0x002140, 0x7fffffff); in gf100_fifo_init()
602 nvkm_wr32(device, 0x002628, 0x00000001); /* ENGINE_INTR_EN */ in gf100_fifo_init()
632 gf100_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo) in gf100_fifo_new() argument
642 return nvkm_fifo_ctor(&gf100_fifo, device, index, 128, &fifo->base); in gf100_fifo_new()