56 nv40_fifo_dma_engine_fini(struct nvkm_fifo_chan *base,  in nv40_fifo_dma_engine_fini()  argument
59 	struct nv04_fifo_chan *chan = nv04_fifo_chan(base);  in nv40_fifo_dma_engine_fini()
61 	struct nvkm_device *device = fifo->base.engine.subdev.device;  in nv40_fifo_dma_engine_fini()
70 	spin_lock_irqsave(&fifo->base.lock, flags);  in nv40_fifo_dma_engine_fini()
73 	chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1);  in nv40_fifo_dma_engine_fini()
74 	if (chid == chan->base.chid)  in nv40_fifo_dma_engine_fini()
81 	spin_unlock_irqrestore(&fifo->base.lock, flags);  in nv40_fifo_dma_engine_fini()
86 nv40_fifo_dma_engine_init(struct nvkm_fifo_chan *base,  in nv40_fifo_dma_engine_init()  argument
89 	struct nv04_fifo_chan *chan = nv04_fifo_chan(base);  in nv40_fifo_dma_engine_init()
91 	struct nvkm_device *device = fifo->base.engine.subdev.device;  in nv40_fifo_dma_engine_init()
101 	spin_lock_irqsave(&fifo->base.lock, flags);  in nv40_fifo_dma_engine_init()
104 	chid = nvkm_rd32(device, 0x003204) & (fifo->base.nr - 1);  in nv40_fifo_dma_engine_init()
105 	if (chid == chan->base.chid)  in nv40_fifo_dma_engine_init()
112 	spin_unlock_irqrestore(&fifo->base.lock, flags);  in nv40_fifo_dma_engine_init()
117 nv40_fifo_dma_engine_dtor(struct nvkm_fifo_chan *base,  in nv40_fifo_dma_engine_dtor()  argument
120 	struct nv04_fifo_chan *chan = nv04_fifo_chan(base);  in nv40_fifo_dma_engine_dtor()
125 nv40_fifo_dma_engine_ctor(struct nvkm_fifo_chan *base,  in nv40_fifo_dma_engine_ctor()  argument
129 	struct nv04_fifo_chan *chan = nv04_fifo_chan(base);  in nv40_fifo_dma_engine_ctor()
140 nv40_fifo_dma_object_ctor(struct nvkm_fifo_chan *base,  in nv40_fifo_dma_object_ctor()  argument
143 	struct nv04_fifo_chan *chan = nv04_fifo_chan(base);  in nv40_fifo_dma_object_ctor()
144 	struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem;  in nv40_fifo_dma_object_ctor()
145 	u32 context = chan->base.chid << 23;  in nv40_fifo_dma_object_ctor()
159 	mutex_lock(&chan->fifo->base.engine.subdev.mutex);  in nv40_fifo_dma_object_ctor()
160 	hash = nvkm_ramht_insert(imem->ramht, object, chan->base.chid, 4,  in nv40_fifo_dma_object_ctor()
162 	mutex_unlock(&chan->fifo->base.engine.subdev.mutex);  in nv40_fifo_dma_object_ctor()
180 nv40_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass,  in nv40_fifo_dma_new()  argument
187 	struct nv04_fifo *fifo = nv04_fifo(base);  in nv40_fifo_dma_new()
189 	struct nvkm_device *device = fifo->base.engine.subdev.device;  in nv40_fifo_dma_new()
205 	*pobject = &chan->base.object;  in nv40_fifo_dma_new()
207 	ret = nvkm_fifo_chan_ctor(&nv40_fifo_dma_func, &fifo->base,  in nv40_fifo_dma_new()
213 				  0, 0xc00000, 0x1000, oclass, &chan->base);  in nv40_fifo_dma_new()
218 	args->v0.chid = chan->base.chid;  in nv40_fifo_dma_new()
219 	chan->ramfc = chan->base.chid * 128;  in nv40_fifo_dma_new()
224 	nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4);  in nv40_fifo_dma_new()
239 	.base.oclass = NV40_CHANNEL_DMA,
240 	.base.minver = 0,
241 	.base.maxver = 0,