49 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_engine_fini()  local
50 	struct nv50_fifo *fifo = chan->fifo;  in nv50_fifo_chan_engine_fini()
75 	nvkm_wr32(device, 0x0032fc, chan->base.inst->addr >> 12);  in nv50_fifo_chan_engine_fini()
81 			   chan->base.chid, chan->base.object.client->name);  in nv50_fifo_chan_engine_fini()
88 		nvkm_kmap(chan->eng);  in nv50_fifo_chan_engine_fini()
89 		nvkm_wo32(chan->eng, offset + 0x00, 0x00000000);  in nv50_fifo_chan_engine_fini()
90 		nvkm_wo32(chan->eng, offset + 0x04, 0x00000000);  in nv50_fifo_chan_engine_fini()
91 		nvkm_wo32(chan->eng, offset + 0x08, 0x00000000);  in nv50_fifo_chan_engine_fini()
92 		nvkm_wo32(chan->eng, offset + 0x0c, 0x00000000);  in nv50_fifo_chan_engine_fini()
93 		nvkm_wo32(chan->eng, offset + 0x10, 0x00000000);  in nv50_fifo_chan_engine_fini()
94 		nvkm_wo32(chan->eng, offset + 0x14, 0x00000000);  in nv50_fifo_chan_engine_fini()
95 		nvkm_done(chan->eng);  in nv50_fifo_chan_engine_fini()
105 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_engine_init()  local
106 	struct nvkm_gpuobj *engn = chan->engn[engine->subdev.index];  in nv50_fifo_chan_engine_init()
116 	nvkm_kmap(chan->eng);  in nv50_fifo_chan_engine_init()
117 	nvkm_wo32(chan->eng, offset + 0x00, 0x00190000);  in nv50_fifo_chan_engine_init()
118 	nvkm_wo32(chan->eng, offset + 0x04, lower_32_bits(limit));  in nv50_fifo_chan_engine_init()
119 	nvkm_wo32(chan->eng, offset + 0x08, lower_32_bits(start));  in nv50_fifo_chan_engine_init()
120 	nvkm_wo32(chan->eng, offset + 0x0c, upper_32_bits(limit) << 24 |  in nv50_fifo_chan_engine_init()
122 	nvkm_wo32(chan->eng, offset + 0x10, 0x00000000);  in nv50_fifo_chan_engine_init()
123 	nvkm_wo32(chan->eng, offset + 0x14, 0x00000000);  in nv50_fifo_chan_engine_init()
124 	nvkm_done(chan->eng);  in nv50_fifo_chan_engine_init()
132 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_engine_dtor()  local
133 	nvkm_gpuobj_del(&chan->engn[engine->subdev.index]);  in nv50_fifo_chan_engine_dtor()
141 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_engine_ctor()  local
147 	return nvkm_object_bind(object, NULL, 0, &chan->engn[engn]);  in nv50_fifo_chan_engine_ctor()
153 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_object_dtor()  local
154 	nvkm_ramht_remove(chan->ramht, cookie);  in nv50_fifo_chan_object_dtor()
161 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_object_ctor()  local
175 	return nvkm_ramht_insert(chan->ramht, object, 0, 4, handle, context);  in nv50_fifo_chan_object_ctor()
181 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_fini()  local
182 	struct nv50_fifo *fifo = chan->fifo;  in nv50_fifo_chan_fini()
184 	u32 chid = chan->base.chid;  in nv50_fifo_chan_fini()
195 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_init()  local
196 	struct nv50_fifo *fifo = chan->fifo;  in nv50_fifo_chan_init()
198 	u64 addr = chan->ramfc->addr >> 12;  in nv50_fifo_chan_init()
199 	u32 chid = chan->base.chid;  in nv50_fifo_chan_init()
208 	struct nv50_fifo_chan *chan = nv50_fifo_chan(base);  in nv50_fifo_chan_dtor()  local
209 	nvkm_vm_ref(NULL, &chan->vm, chan->pgd);  in nv50_fifo_chan_dtor()
210 	nvkm_ramht_del(&chan->ramht);  in nv50_fifo_chan_dtor()
211 	nvkm_gpuobj_del(&chan->pgd);  in nv50_fifo_chan_dtor()
212 	nvkm_gpuobj_del(&chan->eng);  in nv50_fifo_chan_dtor()
213 	nvkm_gpuobj_del(&chan->cache);  in nv50_fifo_chan_dtor()
214 	nvkm_gpuobj_del(&chan->ramfc);  in nv50_fifo_chan_dtor()
215 	return chan;  in nv50_fifo_chan_dtor()
234 		    struct nv50_fifo_chan *chan)  in nv50_fifo_chan_ctor()  argument
245 				  0, 0xc00000, 0x2000, oclass, &chan->base);  in nv50_fifo_chan_ctor()
246 	chan->fifo = fifo;  in nv50_fifo_chan_ctor()
250 	ret = nvkm_gpuobj_new(device, 0x0200, 0x1000, true, chan->base.inst,  in nv50_fifo_chan_ctor()
251 			      &chan->ramfc);  in nv50_fifo_chan_ctor()
255 	ret = nvkm_gpuobj_new(device, 0x1200, 0, true, chan->base.inst,  in nv50_fifo_chan_ctor()
256 			      &chan->eng);  in nv50_fifo_chan_ctor()
260 	ret = nvkm_gpuobj_new(device, 0x4000, 0, false, chan->base.inst,  in nv50_fifo_chan_ctor()
261 			      &chan->pgd);  in nv50_fifo_chan_ctor()
265 	ret = nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht);  in nv50_fifo_chan_ctor()
269 	return nvkm_vm_ref(chan->base.vm, &chan->vm, chan->pgd);  in nv50_fifo_chan_ctor()