48 	return nvkm_gpuobj_new(object->engine->subdev.device, 256,  in nvkm_falcon_cclass_bind()
62 	struct nvkm_device *device = subdev->device;  in nvkm_falcon_intr()  local
64 	u32 dest = nvkm_rd32(device, base + 0x01c);  in nvkm_falcon_intr()
65 	u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16);  in nvkm_falcon_intr()
66 	u32 inst = nvkm_rd32(device, base + 0x050) & 0x3fffffff;  in nvkm_falcon_intr()
70 	chan = nvkm_fifo_chan_inst(device->fifo, (u64)inst << 12, &flags);  in nvkm_falcon_intr()
75 			nvkm_wr32(device, base + 0x004, 0x00000040);  in nvkm_falcon_intr()
82 		nvkm_wr32(device, base + 0x004, 0x00000010);  in nvkm_falcon_intr()
88 		nvkm_wr32(device, base + 0x004, intr);  in nvkm_falcon_intr()
91 	nvkm_fifo_chan_put(device->fifo, flags, &chan);  in nvkm_falcon_intr()
98 	struct nvkm_device *device = falcon->engine.subdev.device;  in nvkm_falcon_fini()  local
110 	nvkm_mask(device, base + 0x048, 0x00000003, 0x00000000);  in nvkm_falcon_fini()
111 	nvkm_wr32(device, base + 0x014, 0xffffffff);  in nvkm_falcon_fini()
130 	struct nvkm_device *device = subdev->device;  in nvkm_falcon_oneinit()  local
135 	if (device->chipset <  0xa3 ||  in nvkm_falcon_oneinit()
136 	    device->chipset == 0xaa || device->chipset == 0xac) {  in nvkm_falcon_oneinit()
140 		caps = nvkm_rd32(device, base + 0x12c);  in nvkm_falcon_oneinit()
145 	caps = nvkm_rd32(device, base + 0x108);  in nvkm_falcon_oneinit()
161 	struct nvkm_device *device = subdev->device;  in nvkm_falcon_init()  local
170 			nvkm_msec(device, 2000,  in nvkm_falcon_init()
171 				if (nvkm_rd32(device, base + 0x008) & 0x00000010)  in nvkm_falcon_init()
175 			nvkm_msec(device, 2000,  in nvkm_falcon_init()
176 				if (!(nvkm_rd32(device, base + 0x180) & 0x80000000))  in nvkm_falcon_init()
180 		nvkm_wr32(device, base + 0x004, 0x00000010);  in nvkm_falcon_init()
184 	nvkm_wr32(device, base + 0x014, 0xffffffff);  in nvkm_falcon_init()
191 			 device->chipset, falcon->addr >> 12);  in nvkm_falcon_init()
193 		ret = request_firmware(&fw, name, device->dev);  in nvkm_falcon_init()
210 			 device->chipset, falcon->addr >> 12);  in nvkm_falcon_init()
212 		ret = request_firmware(&fw, name, device->dev);  in nvkm_falcon_init()
225 			 device->chipset, falcon->addr >> 12);  in nvkm_falcon_init()
227 		ret = request_firmware(&fw, name, device->dev);  in nvkm_falcon_init()
245 		ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,  in nvkm_falcon_init()
262 		if (device->card_type < NV_C0)  in nvkm_falcon_init()
263 			nvkm_wr32(device, base + 0x618, 0x04000000);  in nvkm_falcon_init()
265 			nvkm_wr32(device, base + 0x618, 0x00000114);  in nvkm_falcon_init()
266 		nvkm_wr32(device, base + 0x11c, 0);  in nvkm_falcon_init()
267 		nvkm_wr32(device, base + 0x110, addr >> 8);  in nvkm_falcon_init()
268 		nvkm_wr32(device, base + 0x114, 0);  in nvkm_falcon_init()
269 		nvkm_wr32(device, base + 0x118, 0x00006610);  in nvkm_falcon_init()
278 			nvkm_wr32(device, base + 0xff8, 0x00100000);  in nvkm_falcon_init()
280 				nvkm_wr32(device, base + 0xff4, falcon->code.data[i]);  in nvkm_falcon_init()
282 			nvkm_wr32(device, base + 0x180, 0x01000000);  in nvkm_falcon_init()
285 					nvkm_wr32(device, base + 0x188, i >> 6);  in nvkm_falcon_init()
286 				nvkm_wr32(device, base + 0x184, falcon->code.data[i]);  in nvkm_falcon_init()
293 		nvkm_wr32(device, base + 0xff8, 0x00000000);  in nvkm_falcon_init()
295 			nvkm_wr32(device, base + 0xff4, falcon->data.data[i]);  in nvkm_falcon_init()
297 			nvkm_wr32(device, base + 0xff4, 0x00000000);  in nvkm_falcon_init()
299 		nvkm_wr32(device, base + 0x1c0, 0x01000000);  in nvkm_falcon_init()
301 			nvkm_wr32(device, base + 0x1c4, falcon->data.data[i]);  in nvkm_falcon_init()
303 			nvkm_wr32(device, base + 0x1c4, 0x00000000);  in nvkm_falcon_init()
307 	nvkm_wr32(device, base + 0x10c, 0x00000001); /* BLOCK_ON_FIFO */  in nvkm_falcon_init()
308 	nvkm_wr32(device, base + 0x104, 0x00000000); /* ENTRY */  in nvkm_falcon_init()
309 	nvkm_wr32(device, base + 0x100, 0x00000002); /* TRIGGER */  in nvkm_falcon_init()
310 	nvkm_wr32(device, base + 0x048, 0x00000003); /* FIFO | CHSW */  in nvkm_falcon_init()
336 		 struct nvkm_device *device, int index, bool enable,  in nvkm_falcon_new_()  argument
351 	return nvkm_engine_ctor(&nvkm_falcon, device, index, func->pmc_enable,  in nvkm_falcon_new_()