Lines Matching refs:base
24 #define nv04_dmaobj(p) container_of((p), struct nv04_dmaobj, base)
34 struct nvkm_dmaobj base; member
41 nv04_dmaobj_bind(struct nvkm_dmaobj *base, struct nvkm_gpuobj *parent, in nv04_dmaobj_bind() argument
44 struct nv04_dmaobj *dmaobj = nv04_dmaobj(base); in nv04_dmaobj_bind()
45 struct nvkm_device *device = dmaobj->base.dma->engine.subdev.device; in nv04_dmaobj_bind()
46 u64 offset = dmaobj->base.start & 0xfffff000; in nv04_dmaobj_bind()
47 u64 adjust = dmaobj->base.start & 0x00000fff; in nv04_dmaobj_bind()
48 u32 length = dmaobj->base.limit - dmaobj->base.start; in nv04_dmaobj_bind()
54 if (!dmaobj->base.start) in nv04_dmaobj_bind()
90 *pdmaobj = &dmaobj->base; in nv04_dmaobj_new()
93 &data, &size, &dmaobj->base); in nv04_dmaobj_new()
97 if (dmaobj->base.target == NV_MEM_TARGET_VM) { in nv04_dmaobj_new()
100 dmaobj->base.target = NV_MEM_TARGET_PCI; in nv04_dmaobj_new()
101 dmaobj->base.access = NV_MEM_ACCESS_RW; in nv04_dmaobj_new()
104 dmaobj->flags0 = oclass->base.oclass; in nv04_dmaobj_new()
105 switch (dmaobj->base.target) { in nv04_dmaobj_new()
119 switch (dmaobj->base.access) { in nv04_dmaobj_new()