136 		    struct nv50_disp_root *root, int chid, int head, u64 push,  in nv50_disp_dmac_new_()  argument
152 				  chid, head, oclass, &chan->base);  in nv50_disp_dmac_new_()
182 				 chan->base.chid, -10, handle,  in nv50_disp_dmac_bind()
183 				 chan->base.chid << 28 |  in nv50_disp_dmac_bind()
184 				 chan->base.chid);  in nv50_disp_dmac_bind()
193 	int chid = chan->base.chid;  in nv50_disp_dmac_fini()  local
196 	nvkm_mask(device, 0x610200 + (chid * 0x0010), 0x00001010, 0x00001000);  in nv50_disp_dmac_fini()
197 	nvkm_mask(device, 0x610200 + (chid * 0x0010), 0x00000003, 0x00000000);  in nv50_disp_dmac_fini()
199 		if (!(nvkm_rd32(device, 0x610200 + (chid * 0x10)) & 0x001e0000))  in nv50_disp_dmac_fini()
202 		nvkm_error(subdev, "ch %d fini timeout, %08x\n", chid,  in nv50_disp_dmac_fini()
203 			   nvkm_rd32(device, 0x610200 + (chid * 0x10)));  in nv50_disp_dmac_fini()
207 	nvkm_mask(device, 0x610028, 0x00010001 << chid, 0x00000000 << chid);  in nv50_disp_dmac_fini()
216 	int chid = chan->base.chid;  in nv50_disp_dmac_init()  local
219 	nvkm_mask(device, 0x610028, 0x00010000 << chid, 0x00010000 << chid);  in nv50_disp_dmac_init()
222 	nvkm_wr32(device, 0x610204 + (chid * 0x0010), chan->push);  in nv50_disp_dmac_init()
223 	nvkm_wr32(device, 0x610208 + (chid * 0x0010), 0x00010000);  in nv50_disp_dmac_init()
224 	nvkm_wr32(device, 0x61020c + (chid * 0x0010), chid);  in nv50_disp_dmac_init()
225 	nvkm_mask(device, 0x610200 + (chid * 0x0010), 0x00000010, 0x00000010);  in nv50_disp_dmac_init()
226 	nvkm_wr32(device, 0x640000 + (chid * 0x1000), 0x00000000);  in nv50_disp_dmac_init()
227 	nvkm_wr32(device, 0x610200 + (chid * 0x0010), 0x00000013);  in nv50_disp_dmac_init()
231 		if (!(nvkm_rd32(device, 0x610200 + (chid * 0x10)) & 0x80000000))  in nv50_disp_dmac_init()
234 		nvkm_error(subdev, "ch %d init timeout, %08x\n", chid,  in nv50_disp_dmac_init()
235 			   nvkm_rd32(device, 0x610200 + (chid * 0x10)));  in nv50_disp_dmac_init()