54 	u32 reg_val;  member
208 	u32 reg_val, hdcp_int_status;  in hdmi_hdcp_irq()  local
212 	reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_INT_CTRL);  in hdmi_hdcp_irq()
213 	hdcp_int_status = reg_val & HDCP_INT_STATUS_MASK;  in hdmi_hdcp_irq()
219 	reg_val |= hdcp_int_status << 1;  in hdmi_hdcp_irq()
222 		reg_val |= HDMI_HDCP_INT_CTRL_AUTH_FAIL_INFO_ACK;  in hdmi_hdcp_irq()
223 	hdmi_write(hdmi, REG_HDMI_HDCP_INT_CTRL, reg_val);  in hdmi_hdcp_irq()
237 		reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_LINK0_STATUS);  in hdmi_hdcp_irq()
239 			__func__, reg_val);  in hdmi_hdcp_irq()
293 	u32 reg_val, failure, nack0;  in reset_hdcp_ddc_failures()  local
297 	reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS);  in reset_hdcp_ddc_failures()
298 	failure = reg_val & HDMI_HDCP_DDC_STATUS_FAILED;  in reset_hdcp_ddc_failures()
299 	nack0 = reg_val & HDMI_HDCP_DDC_STATUS_NACK0;  in reset_hdcp_ddc_failures()
301 		reg_val, failure, nack0);  in reset_hdcp_ddc_failures()
318 		reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_CTRL_1);  in reset_hdcp_ddc_failures()
319 		reg_val |= HDMI_HDCP_DDC_CTRL_1_FAILED_ACK;  in reset_hdcp_ddc_failures()
320 		hdmi_write(hdmi, REG_HDMI_HDCP_DDC_CTRL_1, reg_val);  in reset_hdcp_ddc_failures()
323 		reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DDC_STATUS);  in reset_hdcp_ddc_failures()
324 		if (reg_val & HDMI_HDCP_DDC_STATUS_FAILED)  in reset_hdcp_ddc_failures()
336 		reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);  in reset_hdcp_ddc_failures()
337 		reg_val |= HDMI_DDC_CTRL_SW_STATUS_RESET;  in reset_hdcp_ddc_failures()
338 		hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);  in reset_hdcp_ddc_failures()
342 		reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);  in reset_hdcp_ddc_failures()
343 		reg_val &= ~HDMI_DDC_CTRL_SW_STATUS_RESET;  in reset_hdcp_ddc_failures()
344 		hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);  in reset_hdcp_ddc_failures()
347 		reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);  in reset_hdcp_ddc_failures()
348 		reg_val |= HDMI_DDC_CTRL_SOFT_RESET;  in reset_hdcp_ddc_failures()
349 		hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);  in reset_hdcp_ddc_failures()
355 		reg_val = hdmi_read(hdmi, REG_HDMI_DDC_CTRL);  in reset_hdcp_ddc_failures()
356 		reg_val &= ~HDMI_DDC_CTRL_SOFT_RESET;  in reset_hdcp_ddc_failures()
357 		hdmi_write(hdmi, REG_HDMI_DDC_CTRL, reg_val);  in reset_hdcp_ddc_failures()
411 	u32 reg_val;  in hdmi_hdcp_reauth_work()  local
421 	reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);  in hdmi_hdcp_reauth_work()
422 	reg_val &= ~HDMI_HPD_CTRL_ENABLE;  in hdmi_hdcp_reauth_work()
423 	hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);  in hdmi_hdcp_reauth_work()
443 	reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);  in hdmi_hdcp_reauth_work()
444 	reg_val |= HDMI_HPD_CTRL_ENABLE;  in hdmi_hdcp_reauth_work()
445 	hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);  in hdmi_hdcp_reauth_work()
468 	u32 reg_val;  in hdmi_hdcp_auth_prepare()  local
484 	reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);  in hdmi_hdcp_auth_prepare()
485 	reg_val &= ~HDMI_CTRL_ENCRYPTED;  in hdmi_hdcp_auth_prepare()
486 	hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);  in hdmi_hdcp_auth_prepare()
489 	reg_val = hdmi_read(hdmi, REG_HDMI_DDC_ARBITRATION);  in hdmi_hdcp_auth_prepare()
490 	reg_val &= ~HDMI_DDC_ARBITRATION_HW_ARBITRATION;  in hdmi_hdcp_auth_prepare()
491 	hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val);  in hdmi_hdcp_auth_prepare()
510 	reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_DEBUG_CTRL);  in hdmi_hdcp_auth_prepare()
511 	reg_val &= ~HDMI_HDCP_DEBUG_CTRL_RNG_CIPHER;  in hdmi_hdcp_auth_prepare()
512 	hdmi_write(hdmi, REG_HDMI_HDCP_DEBUG_CTRL, reg_val);  in hdmi_hdcp_auth_prepare()
549 	u32 reg_val;  in hdmi_hdcp_auth_fail()  local
555 	reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);  in hdmi_hdcp_auth_fail()
556 	reg_val &= ~HDMI_CTRL_ENCRYPTED;  in hdmi_hdcp_auth_fail()
557 	hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);  in hdmi_hdcp_auth_fail()
567 	u32 reg_val;  in hdmi_hdcp_auth_done()  local
575 	reg_val = hdmi_read(hdmi, REG_HDMI_DDC_ARBITRATION);  in hdmi_hdcp_auth_done()
576 	reg_val |= HDMI_DDC_ARBITRATION_HW_ARBITRATION;  in hdmi_hdcp_auth_done()
577 	hdmi_write(hdmi, REG_HDMI_DDC_ARBITRATION, reg_val);  in hdmi_hdcp_auth_done()
582 	reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);  in hdmi_hdcp_auth_done()
583 	reg_val |= HDMI_CTRL_ENCRYPTED;  in hdmi_hdcp_auth_done()
584 	hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);  in hdmi_hdcp_auth_done()
1129 	u32 reg_val, data, reg;  in hdmi_hdcp_write_ksv_fifo()  local
1136 		reg_val = hdmi_read(hdmi, REG_HDMI_HDCP_SHA_STATUS);  in hdmi_hdcp_write_ksv_fifo()
1137 		DBG("HDCP_SHA_STATUS=%08x", reg_val);  in hdmi_hdcp_write_ksv_fifo()
1140 			if (reg_val & HDMI_HDCP_SHA_STATUS_COMP_DONE) {  in hdmi_hdcp_write_ksv_fifo()
1148 			if (!(reg_val & HDMI_HDCP_SHA_STATUS_BLOCK_DONE))  in hdmi_hdcp_write_ksv_fifo()
1166 		reg_val = ksv_fifo[i] << 16;  in hdmi_hdcp_write_ksv_fifo()
1168 			reg_val |= HDMI_HDCP_SHA_DATA_DONE;  in hdmi_hdcp_write_ksv_fifo()
1171 		data = reg_val;  in hdmi_hdcp_write_ksv_fifo()
1316 	u32 reg_val;  in hdmi_hdcp_on()  local
1327 	reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);  in hdmi_hdcp_on()
1328 	reg_val &= ~HDMI_CTRL_ENCRYPTED;  in hdmi_hdcp_on()
1329 	hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);  in hdmi_hdcp_on()
1342 	u32 reg_val;  in hdmi_hdcp_off()  local
1357 	reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);  in hdmi_hdcp_off()
1358 	reg_val &= ~HDMI_HPD_CTRL_ENABLE;  in hdmi_hdcp_off()
1359 	hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);  in hdmi_hdcp_off()
1387 	reg_val = hdmi_read(hdmi, REG_HDMI_CTRL);  in hdmi_hdcp_off()
1388 	reg_val &= ~HDMI_CTRL_ENCRYPTED;  in hdmi_hdcp_off()
1389 	hdmi_write(hdmi, REG_HDMI_CTRL, reg_val);  in hdmi_hdcp_off()
1392 	reg_val = hdmi_read(hdmi, REG_HDMI_HPD_CTRL);  in hdmi_hdcp_off()
1393 	reg_val |= HDMI_HPD_CTRL_ENABLE;  in hdmi_hdcp_off()
1394 	hdmi_write(hdmi, REG_HDMI_HPD_CTRL, reg_val);  in hdmi_hdcp_off()