161 		pr_err("%s: Can't find aux_clk, %d\n", __func__, ret);  in edp_clk_init()
169 		pr_err("%s: Can't find pixel_clk, %d\n", __func__, ret);  in edp_clk_init()
177 		pr_err("%s: Can't find ahb_clk, %d\n", __func__, ret);  in edp_clk_init()
185 		pr_err("%s: Can't find link_clk, %d\n", __func__, ret);  in edp_clk_init()
194 		pr_err("%s: Can't find mdp_core_clk, %d\n", __func__, ret);  in edp_clk_init()
211 			pr_err("%s: Failed to enable ahb clk\n", __func__);  in edp_clk_enable()
218 			pr_err("%s: Failed to set rate aux clk\n", __func__);  in edp_clk_enable()
223 			pr_err("%s: Failed to enable aux clk\n", __func__);  in edp_clk_enable()
234 			pr_err("%s: Failed to set rate to link clk\n",  in edp_clk_enable()
241 			pr_err("%s: Failed to enable link clk\n", __func__);  in edp_clk_enable()
251 			pr_err("%s: Failed to set rate to pixel clk\n",  in edp_clk_enable()
258 			pr_err("%s: Failed to enable pixel clk\n", __func__);  in edp_clk_enable()
265 			pr_err("%s: Failed to enable mdp core clk\n", __func__);  in edp_clk_enable()
309 		pr_err("%s: Could not get vdda reg, ret = %ld\n", __func__,  in edp_regulator_init()
316 		pr_err("Could not get lvl-vdd reg, %ld",  in edp_regulator_init()
331 		pr_err("%s:vdda_vreg set_voltage failed, %d\n", __func__, ret);  in edp_regulator_enable()
337 		pr_err("%s: vdda_vreg set regulator mode failed.\n", __func__);  in edp_regulator_enable()
343 		pr_err("%s: Failed to enable vdda_vreg regulator.\n", __func__);  in edp_regulator_enable()
349 		pr_err("Failed to enable lvl-vdd reg regulator, %d", ret);  in edp_regulator_enable()
380 		pr_err("%s: cannot get panel-hpd-gpios, %d\n", __func__, ret);  in edp_gpio_config()
388 		pr_err("%s: cannot get panel-en-gpios, %d\n", __func__, ret);  in edp_gpio_config()
499 		pr_err("%s: Set sw/pe to panel failed\n", __func__);  in edp_lane_set_write()
513 		pr_err("%s: Set training pattern to panel failed\n", __func__);  in edp_train_pattern_set_write()
566 		pr_err("%s: set link_train=%d failed\n", __func__, train);  in edp_host_train_set()
629 			pr_err("%s: read link status failed\n", __func__);  in edp_start_link_train_1()
686 			pr_err("%s: read link status failed\n", __func__);  in edp_start_link_train_2()
795 			pr_err("%s: Training 1 failed", __func__);  in edp_do_link_train()
813 			pr_err("%s: Training 2 failed", __func__);  in edp_do_link_train()
864 		pr_err("%s: Invalid link rate, %d\n", __func__,  in edp_sw_mvid_nvid()
1102 		pr_err("%s: edp is NULL!\n", __func__);  in msm_edp_ctrl_init()
1120 		pr_err("%s:regulator init fail\n", __func__);  in msm_edp_ctrl_init()
1125 		pr_err("%s:clk init fail\n", __func__);  in msm_edp_ctrl_init()
1130 		pr_err("%s:failed to configure GPIOs: %d", __func__, ret);  in msm_edp_ctrl_init()
1137 		pr_err("%s:failed to init aux\n", __func__);  in msm_edp_ctrl_init()
1143 		pr_err("%s:failed to init phy\n", __func__);  in msm_edp_ctrl_init()
1203 		pr_err("%s: AUX channel is NOT ready\n", __func__);  in msm_edp_ctrl_panel_connected()
1243 		pr_err("%s: read dpcd cap failed, %d\n", __func__, ret);  in msm_edp_ctrl_get_panel_info()
1252 		pr_err("%s: edid read fail\n", __func__);  in msm_edp_ctrl_get_panel_info()
1290 		pr_err("%s, fail to prepare enable ahb clk\n", __func__);  in msm_edp_ctrl_timing_cfg()
1341 		pr_err("%s: Invalid link rate,%d\n", __func__, ctrl->link_rate);  in msm_edp_ctrl_pixel_clock_valid()