Lines Matching refs:val
214 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val) in CP_LOAD_STATE_0_DST_OFF() argument
216 return ((val) << CP_LOAD_STATE_0_DST_OFF__SHIFT) & CP_LOAD_STATE_0_DST_OFF__MASK; in CP_LOAD_STATE_0_DST_OFF()
220 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val) in CP_LOAD_STATE_0_STATE_SRC() argument
222 return ((val) << CP_LOAD_STATE_0_STATE_SRC__SHIFT) & CP_LOAD_STATE_0_STATE_SRC__MASK; in CP_LOAD_STATE_0_STATE_SRC()
226 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val) in CP_LOAD_STATE_0_STATE_BLOCK() argument
228 return ((val) << CP_LOAD_STATE_0_STATE_BLOCK__SHIFT) & CP_LOAD_STATE_0_STATE_BLOCK__MASK; in CP_LOAD_STATE_0_STATE_BLOCK()
232 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE_0_NUM_UNIT() argument
234 return ((val) << CP_LOAD_STATE_0_NUM_UNIT__SHIFT) & CP_LOAD_STATE_0_NUM_UNIT__MASK; in CP_LOAD_STATE_0_NUM_UNIT()
240 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val) in CP_LOAD_STATE_1_STATE_TYPE() argument
242 return ((val) << CP_LOAD_STATE_1_STATE_TYPE__SHIFT) & CP_LOAD_STATE_1_STATE_TYPE__MASK; in CP_LOAD_STATE_1_STATE_TYPE()
246 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) in CP_LOAD_STATE_1_EXT_SRC_ADDR() argument
248 return ((val >> 2) << CP_LOAD_STATE_1_EXT_SRC_ADDR__SHIFT) & CP_LOAD_STATE_1_EXT_SRC_ADDR__MASK; in CP_LOAD_STATE_1_EXT_SRC_ADDR()
254 static inline uint32_t CP_DRAW_INDX_0_VIZ_QUERY(uint32_t val) in CP_DRAW_INDX_0_VIZ_QUERY() argument
256 return ((val) << CP_DRAW_INDX_0_VIZ_QUERY__SHIFT) & CP_DRAW_INDX_0_VIZ_QUERY__MASK; in CP_DRAW_INDX_0_VIZ_QUERY()
262 static inline uint32_t CP_DRAW_INDX_1_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_1_PRIM_TYPE() argument
264 return ((val) << CP_DRAW_INDX_1_PRIM_TYPE__SHIFT) & CP_DRAW_INDX_1_PRIM_TYPE__MASK; in CP_DRAW_INDX_1_PRIM_TYPE()
268 static inline uint32_t CP_DRAW_INDX_1_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_1_SOURCE_SELECT() argument
270 return ((val) << CP_DRAW_INDX_1_SOURCE_SELECT__SHIFT) & CP_DRAW_INDX_1_SOURCE_SELECT__MASK; in CP_DRAW_INDX_1_SOURCE_SELECT()
274 static inline uint32_t CP_DRAW_INDX_1_VIS_CULL(enum pc_di_vis_cull_mode val) in CP_DRAW_INDX_1_VIS_CULL() argument
276 return ((val) << CP_DRAW_INDX_1_VIS_CULL__SHIFT) & CP_DRAW_INDX_1_VIS_CULL__MASK; in CP_DRAW_INDX_1_VIS_CULL()
280 static inline uint32_t CP_DRAW_INDX_1_INDEX_SIZE(enum pc_di_index_size val) in CP_DRAW_INDX_1_INDEX_SIZE() argument
282 return ((val) << CP_DRAW_INDX_1_INDEX_SIZE__SHIFT) & CP_DRAW_INDX_1_INDEX_SIZE__MASK; in CP_DRAW_INDX_1_INDEX_SIZE()
289 static inline uint32_t CP_DRAW_INDX_1_NUM_INSTANCES(uint32_t val) in CP_DRAW_INDX_1_NUM_INSTANCES() argument
291 return ((val) << CP_DRAW_INDX_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_1_NUM_INSTANCES__MASK; in CP_DRAW_INDX_1_NUM_INSTANCES()
297 static inline uint32_t CP_DRAW_INDX_2_NUM_INDICES(uint32_t val) in CP_DRAW_INDX_2_NUM_INDICES() argument
299 return ((val) << CP_DRAW_INDX_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_2_NUM_INDICES__MASK; in CP_DRAW_INDX_2_NUM_INDICES()
305 static inline uint32_t CP_DRAW_INDX_3_INDX_BASE(uint32_t val) in CP_DRAW_INDX_3_INDX_BASE() argument
307 return ((val) << CP_DRAW_INDX_3_INDX_BASE__SHIFT) & CP_DRAW_INDX_3_INDX_BASE__MASK; in CP_DRAW_INDX_3_INDX_BASE()
313 static inline uint32_t CP_DRAW_INDX_4_INDX_SIZE(uint32_t val) in CP_DRAW_INDX_4_INDX_SIZE() argument
315 return ((val) << CP_DRAW_INDX_4_INDX_SIZE__SHIFT) & CP_DRAW_INDX_4_INDX_SIZE__MASK; in CP_DRAW_INDX_4_INDX_SIZE()
321 static inline uint32_t CP_DRAW_INDX_2_0_VIZ_QUERY(uint32_t val) in CP_DRAW_INDX_2_0_VIZ_QUERY() argument
323 return ((val) << CP_DRAW_INDX_2_0_VIZ_QUERY__SHIFT) & CP_DRAW_INDX_2_0_VIZ_QUERY__MASK; in CP_DRAW_INDX_2_0_VIZ_QUERY()
329 static inline uint32_t CP_DRAW_INDX_2_1_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_2_1_PRIM_TYPE() argument
331 return ((val) << CP_DRAW_INDX_2_1_PRIM_TYPE__SHIFT) & CP_DRAW_INDX_2_1_PRIM_TYPE__MASK; in CP_DRAW_INDX_2_1_PRIM_TYPE()
335 static inline uint32_t CP_DRAW_INDX_2_1_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_2_1_SOURCE_SELECT() argument
337 return ((val) << CP_DRAW_INDX_2_1_SOURCE_SELECT__SHIFT) & CP_DRAW_INDX_2_1_SOURCE_SELECT__MASK; in CP_DRAW_INDX_2_1_SOURCE_SELECT()
341 static inline uint32_t CP_DRAW_INDX_2_1_VIS_CULL(enum pc_di_vis_cull_mode val) in CP_DRAW_INDX_2_1_VIS_CULL() argument
343 return ((val) << CP_DRAW_INDX_2_1_VIS_CULL__SHIFT) & CP_DRAW_INDX_2_1_VIS_CULL__MASK; in CP_DRAW_INDX_2_1_VIS_CULL()
347 static inline uint32_t CP_DRAW_INDX_2_1_INDEX_SIZE(enum pc_di_index_size val) in CP_DRAW_INDX_2_1_INDEX_SIZE() argument
349 return ((val) << CP_DRAW_INDX_2_1_INDEX_SIZE__SHIFT) & CP_DRAW_INDX_2_1_INDEX_SIZE__MASK; in CP_DRAW_INDX_2_1_INDEX_SIZE()
356 static inline uint32_t CP_DRAW_INDX_2_1_NUM_INSTANCES(uint32_t val) in CP_DRAW_INDX_2_1_NUM_INSTANCES() argument
358 return ((val) << CP_DRAW_INDX_2_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_2_1_NUM_INSTANCES__MASK; in CP_DRAW_INDX_2_1_NUM_INSTANCES()
364 static inline uint32_t CP_DRAW_INDX_2_2_NUM_INDICES(uint32_t val) in CP_DRAW_INDX_2_2_NUM_INDICES() argument
366 return ((val) << CP_DRAW_INDX_2_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_2_2_NUM_INDICES__MASK; in CP_DRAW_INDX_2_2_NUM_INDICES()
372 static inline uint32_t CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_OFFSET_0_PRIM_TYPE() argument
374 return ((val) << CP_DRAW_INDX_OFFSET_0_PRIM_TYPE__SHIFT) & CP_DRAW_INDX_OFFSET_0_PRIM_TYPE__MASK; in CP_DRAW_INDX_OFFSET_0_PRIM_TYPE()
378 static inline uint32_t CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT() argument
380 …return ((val) << CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT__SHIFT) & CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT… in CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT()
385 static inline uint32_t CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(enum a4xx_index_size val) in CP_DRAW_INDX_OFFSET_0_INDEX_SIZE() argument
387 return ((val) << CP_DRAW_INDX_OFFSET_0_INDEX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_0_INDEX_SIZE__MASK; in CP_DRAW_INDX_OFFSET_0_INDEX_SIZE()
391 static inline uint32_t CP_DRAW_INDX_OFFSET_0_TESS_MODE(uint32_t val) in CP_DRAW_INDX_OFFSET_0_TESS_MODE() argument
393 return ((val) << CP_DRAW_INDX_OFFSET_0_TESS_MODE__SHIFT) & CP_DRAW_INDX_OFFSET_0_TESS_MODE__MASK; in CP_DRAW_INDX_OFFSET_0_TESS_MODE()
399 static inline uint32_t CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES(uint32_t val) in CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES() argument
401 …return ((val) << CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES__SHIFT) & CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES… in CP_DRAW_INDX_OFFSET_1_NUM_INSTANCES()
407 static inline uint32_t CP_DRAW_INDX_OFFSET_2_NUM_INDICES(uint32_t val) in CP_DRAW_INDX_OFFSET_2_NUM_INDICES() argument
409 …return ((val) << CP_DRAW_INDX_OFFSET_2_NUM_INDICES__SHIFT) & CP_DRAW_INDX_OFFSET_2_NUM_INDICES__MA… in CP_DRAW_INDX_OFFSET_2_NUM_INDICES()
417 static inline uint32_t CP_DRAW_INDX_OFFSET_4_INDX_BASE(uint32_t val) in CP_DRAW_INDX_OFFSET_4_INDX_BASE() argument
419 return ((val) << CP_DRAW_INDX_OFFSET_4_INDX_BASE__SHIFT) & CP_DRAW_INDX_OFFSET_4_INDX_BASE__MASK; in CP_DRAW_INDX_OFFSET_4_INDX_BASE()
425 static inline uint32_t CP_DRAW_INDX_OFFSET_5_INDX_SIZE(uint32_t val) in CP_DRAW_INDX_OFFSET_5_INDX_SIZE() argument
427 return ((val) << CP_DRAW_INDX_OFFSET_5_INDX_SIZE__SHIFT) & CP_DRAW_INDX_OFFSET_5_INDX_SIZE__MASK; in CP_DRAW_INDX_OFFSET_5_INDX_SIZE()
433 static inline uint32_t CP_SET_DRAW_STATE_0_COUNT(uint32_t val) in CP_SET_DRAW_STATE_0_COUNT() argument
435 return ((val) << CP_SET_DRAW_STATE_0_COUNT__SHIFT) & CP_SET_DRAW_STATE_0_COUNT__MASK; in CP_SET_DRAW_STATE_0_COUNT()
443 static inline uint32_t CP_SET_DRAW_STATE_0_GROUP_ID(uint32_t val) in CP_SET_DRAW_STATE_0_GROUP_ID() argument
445 return ((val) << CP_SET_DRAW_STATE_0_GROUP_ID__SHIFT) & CP_SET_DRAW_STATE_0_GROUP_ID__MASK; in CP_SET_DRAW_STATE_0_GROUP_ID()
451 static inline uint32_t CP_SET_DRAW_STATE_1_ADDR(uint32_t val) in CP_SET_DRAW_STATE_1_ADDR() argument
453 return ((val) << CP_SET_DRAW_STATE_1_ADDR__SHIFT) & CP_SET_DRAW_STATE_1_ADDR__MASK; in CP_SET_DRAW_STATE_1_ADDR()
461 static inline uint32_t CP_SET_BIN_1_X1(uint32_t val) in CP_SET_BIN_1_X1() argument
463 return ((val) << CP_SET_BIN_1_X1__SHIFT) & CP_SET_BIN_1_X1__MASK; in CP_SET_BIN_1_X1()
467 static inline uint32_t CP_SET_BIN_1_Y1(uint32_t val) in CP_SET_BIN_1_Y1() argument
469 return ((val) << CP_SET_BIN_1_Y1__SHIFT) & CP_SET_BIN_1_Y1__MASK; in CP_SET_BIN_1_Y1()
475 static inline uint32_t CP_SET_BIN_2_X2(uint32_t val) in CP_SET_BIN_2_X2() argument
477 return ((val) << CP_SET_BIN_2_X2__SHIFT) & CP_SET_BIN_2_X2__MASK; in CP_SET_BIN_2_X2()
481 static inline uint32_t CP_SET_BIN_2_Y2(uint32_t val) in CP_SET_BIN_2_Y2() argument
483 return ((val) << CP_SET_BIN_2_Y2__SHIFT) & CP_SET_BIN_2_Y2__MASK; in CP_SET_BIN_2_Y2()
489 static inline uint32_t CP_SET_BIN_DATA_0_BIN_DATA_ADDR(uint32_t val) in CP_SET_BIN_DATA_0_BIN_DATA_ADDR() argument
491 return ((val) << CP_SET_BIN_DATA_0_BIN_DATA_ADDR__SHIFT) & CP_SET_BIN_DATA_0_BIN_DATA_ADDR__MASK; in CP_SET_BIN_DATA_0_BIN_DATA_ADDR()
497 static inline uint32_t CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS(uint32_t val) in CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS() argument
499 …return ((val) << CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS__SHIFT) & CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS__… in CP_SET_BIN_DATA_1_BIN_SIZE_ADDRESS()