Lines Matching refs:i0
397 static inline uint32_t REG_A4XX_RB_MRT(uint32_t i0) { return 0x000020a4 + 0x5*i0; } in REG_A4XX_RB_MRT() argument
399 static inline uint32_t REG_A4XX_RB_MRT_CONTROL(uint32_t i0) { return 0x000020a4 + 0x5*i0; } in REG_A4XX_RB_MRT_CONTROL() argument
412 static inline uint32_t REG_A4XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x000020a5 + 0x5*i0; } in REG_A4XX_RB_MRT_BUF_INFO() argument
445 static inline uint32_t REG_A4XX_RB_MRT_BASE(uint32_t i0) { return 0x000020a6 + 0x5*i0; } in REG_A4XX_RB_MRT_BASE() argument
447 static inline uint32_t REG_A4XX_RB_MRT_CONTROL3(uint32_t i0) { return 0x000020a7 + 0x5*i0; } in REG_A4XX_RB_MRT_CONTROL3() argument
455 static inline uint32_t REG_A4XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x000020a8 + 0x5*i0; } in REG_A4XX_RB_MRT_BLEND_CONTROL() argument
901 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP(uint32_t i0) { return 0x00002120 + 0x2*i0; } in REG_A4XX_RB_VPORT_Z_CLAMP() argument
903 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MIN(uint32_t i0) { return 0x00002120 + 0x2*i0; } in REG_A4XX_RB_VPORT_Z_CLAMP_MIN() argument
905 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MAX(uint32_t i0) { return 0x00002121 + 0x2*i0; } in REG_A4XX_RB_VPORT_Z_CLAMP_MAX() argument
911 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_TP(uint32_t i0) { return 0x00000004 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_TP() argument
913 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_TP_REG(uint32_t i0) { return 0x00000004 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_TP_REG() argument
915 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_TP(uint32_t i0) { return 0x00000008 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL2_TP() argument
917 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_TP_REG(uint32_t i0) { return 0x00000008 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL2_TP_REG() argument
919 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_TP(uint32_t i0) { return 0x0000000c + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_HYST_TP() argument
921 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_TP_REG(uint32_t i0) { return 0x0000000c + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_HYST_TP_REG() argument
923 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_TP(uint32_t i0) { return 0x00000010 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_DELAY_TP() argument
925 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_TP_REG(uint32_t i0) { return 0x00000010 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_DELAY_TP_REG() argument
1001 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_SP(uint32_t i0) { return 0x00000068 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_SP() argument
1003 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_SP_REG(uint32_t i0) { return 0x00000068 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_SP_REG() argument
1005 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_SP(uint32_t i0) { return 0x0000006c + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL2_SP() argument
1007 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_SP_REG(uint32_t i0) { return 0x0000006c + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL2_SP_REG() argument
1009 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_SP(uint32_t i0) { return 0x00000070 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_HYST_SP() argument
1011 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_SP_REG(uint32_t i0) { return 0x00000070 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_HYST_SP_REG() argument
1013 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_SP(uint32_t i0) { return 0x00000074 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_DELAY_SP() argument
1015 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_SP_REG(uint32_t i0) { return 0x00000074 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_DELAY_SP_REG() argument
1017 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_RB(uint32_t i0) { return 0x00000078 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_RB() argument
1019 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_RB_REG(uint32_t i0) { return 0x00000078 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_RB_REG() argument
1021 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_RB(uint32_t i0) { return 0x0000007c + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL2_RB() argument
1023 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_RB_REG(uint32_t i0) { return 0x0000007c + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL2_RB_REG() argument
1025 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU(uint32_t i0) { return 0x00000082 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU() argument
1027 …c inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU_REG(uint32_t i0) { return 0x00000082 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU_REG() argument
1029 …c inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU(uint32_t i0) { return 0x00000086 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU() argument
1031 …line uint32_t REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU_REG(uint32_t i0) { return 0x00000086 + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU_REG() argument
1045 …line uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1(uint32_t i0) { return 0x0000008e + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1() argument
1047 … uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0) { return 0x0000008e + 0x1*i0; } in REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG() argument
1172 static inline uint32_t REG_A4XX_CP_PROTECT(uint32_t i0) { return 0x00000240 + 0x1*i0; } in REG_A4XX_CP_PROTECT() argument
1174 static inline uint32_t REG_A4XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000240 + 0x1*i0; } in REG_A4XX_CP_PROTECT_REG() argument
1196 static inline uint32_t REG_A4XX_CP_SCRATCH(uint32_t i0) { return 0x00000578 + 0x1*i0; } in REG_A4XX_CP_SCRATCH() argument
1198 static inline uint32_t REG_A4XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000578 + 0x1*i0; } in REG_A4XX_CP_SCRATCH_REG() argument
1284 static inline uint32_t REG_A4XX_SP_VS_OUT(uint32_t i0) { return 0x000022c7 + 0x1*i0; } in REG_A4XX_SP_VS_OUT() argument
1286 static inline uint32_t REG_A4XX_SP_VS_OUT_REG(uint32_t i0) { return 0x000022c7 + 0x1*i0; } in REG_A4XX_SP_VS_OUT_REG() argument
1312 static inline uint32_t REG_A4XX_SP_VS_VPC_DST(uint32_t i0) { return 0x000022d8 + 0x1*i0; } in REG_A4XX_SP_VS_VPC_DST() argument
1314 static inline uint32_t REG_A4XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x000022d8 + 0x1*i0; } in REG_A4XX_SP_VS_VPC_DST_REG() argument
1452 static inline uint32_t REG_A4XX_SP_FS_MRT(uint32_t i0) { return 0x000022f1 + 0x1*i0; } in REG_A4XX_SP_FS_MRT() argument
1454 static inline uint32_t REG_A4XX_SP_FS_MRT_REG(uint32_t i0) { return 0x000022f1 + 0x1*i0; } in REG_A4XX_SP_FS_MRT_REG() argument
1520 static inline uint32_t REG_A4XX_SP_DS_OUT(uint32_t i0) { return 0x0000231b + 0x1*i0; } in REG_A4XX_SP_DS_OUT() argument
1522 static inline uint32_t REG_A4XX_SP_DS_OUT_REG(uint32_t i0) { return 0x0000231b + 0x1*i0; } in REG_A4XX_SP_DS_OUT_REG() argument
1548 static inline uint32_t REG_A4XX_SP_DS_VPC_DST(uint32_t i0) { return 0x0000232c + 0x1*i0; } in REG_A4XX_SP_DS_VPC_DST() argument
1550 static inline uint32_t REG_A4XX_SP_DS_VPC_DST_REG(uint32_t i0) { return 0x0000232c + 0x1*i0; } in REG_A4XX_SP_DS_VPC_DST_REG() argument
1618 static inline uint32_t REG_A4XX_SP_GS_OUT(uint32_t i0) { return 0x00002342 + 0x1*i0; } in REG_A4XX_SP_GS_OUT() argument
1620 static inline uint32_t REG_A4XX_SP_GS_OUT_REG(uint32_t i0) { return 0x00002342 + 0x1*i0; } in REG_A4XX_SP_GS_OUT_REG() argument
1646 static inline uint32_t REG_A4XX_SP_GS_VPC_DST(uint32_t i0) { return 0x00002353 + 0x1*i0; } in REG_A4XX_SP_GS_VPC_DST() argument
1648 static inline uint32_t REG_A4XX_SP_GS_VPC_DST_REG(uint32_t i0) { return 0x00002353 + 0x1*i0; } in REG_A4XX_SP_GS_VPC_DST_REG() argument
1740 static inline uint32_t REG_A4XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x00002142 + 0x1*i0; } in REG_A4XX_VPC_VARYING_INTERP() argument
1742 static inline uint32_t REG_A4XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00002142 + 0x1*i0; } in REG_A4XX_VPC_VARYING_INTERP_MODE() argument
1744 static inline uint32_t REG_A4XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x0000214a + 0x1*i0; } in REG_A4XX_VPC_VARYING_PS_REPL() argument
1746 static inline uint32_t REG_A4XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x0000214a + 0x1*i0;… in REG_A4XX_VPC_VARYING_PS_REPL_MODE() argument
1770 static inline uint32_t REG_A4XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c08 + 0x1*i0; } in REG_A4XX_VSC_PIPE_CONFIG() argument
1772 static inline uint32_t REG_A4XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c08 + 0x1*i0; } in REG_A4XX_VSC_PIPE_CONFIG_REG() argument
1798 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_ADDRESS(uint32_t i0) { return 0x00000c10 + 0x1*i0; } in REG_A4XX_VSC_PIPE_DATA_ADDRESS() argument
1800 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0… in REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG() argument
1802 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH(uint32_t i0) { return 0x00000c18 + 0x1*i0; } in REG_A4XX_VSC_PIPE_DATA_LENGTH() argument
1804 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0x00000c18 + 0x1*i0;… in REG_A4XX_VSC_PIPE_DATA_LENGTH_REG() argument
1892 static inline uint32_t REG_A4XX_VFD_FETCH(uint32_t i0) { return 0x0000220a + 0x4*i0; } in REG_A4XX_VFD_FETCH() argument
1894 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_0(uint32_t i0) { return 0x0000220a + 0x4*i0; } in REG_A4XX_VFD_FETCH_INSTR_0() argument
1910 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_1(uint32_t i0) { return 0x0000220b + 0x4*i0; } in REG_A4XX_VFD_FETCH_INSTR_1() argument
1912 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_2(uint32_t i0) { return 0x0000220c + 0x4*i0; } in REG_A4XX_VFD_FETCH_INSTR_2() argument
1920 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_3(uint32_t i0) { return 0x0000220d + 0x4*i0; } in REG_A4XX_VFD_FETCH_INSTR_3() argument
1928 static inline uint32_t REG_A4XX_VFD_DECODE(uint32_t i0) { return 0x0000228a + 0x1*i0; } in REG_A4XX_VFD_DECODE() argument
1930 static inline uint32_t REG_A4XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000228a + 0x1*i0; } in REG_A4XX_VFD_DECODE_INSTR() argument