Lines Matching refs:power_well
55 #define for_each_power_well(i, power_well, domain_mask, power_domains) \ argument
58 ((power_well) = &(power_domains)->power_wells[i]); \
60 if ((power_well)->domains & (domain_mask))
62 #define for_each_power_well_rev(i, power_well, domain_mask, power_domains) \ argument
64 i >= 0 && ((power_well) = &(power_domains)->power_wells[i]);\
66 if ((power_well)->domains & (domain_mask))
72 struct i915_power_well *power_well) in intel_power_well_enable() argument
74 DRM_DEBUG_KMS("enabling %s\n", power_well->name); in intel_power_well_enable()
75 power_well->ops->enable(dev_priv, power_well); in intel_power_well_enable()
76 power_well->hw_enabled = true; in intel_power_well_enable()
80 struct i915_power_well *power_well) in intel_power_well_disable() argument
82 DRM_DEBUG_KMS("disabling %s\n", power_well->name); in intel_power_well_disable()
83 power_well->hw_enabled = false; in intel_power_well_disable()
84 power_well->ops->disable(dev_priv, power_well); in intel_power_well_disable()
93 struct i915_power_well *power_well) in hsw_power_well_enabled() argument
115 struct i915_power_well *power_well; in __intel_display_power_is_enabled() local
126 for_each_power_well_rev(i, power_well, BIT(domain), power_domains) { in __intel_display_power_is_enabled()
127 if (power_well->always_on) in __intel_display_power_is_enabled()
130 if (!power_well->hw_enabled) { in __intel_display_power_is_enabled()
225 struct i915_power_well *power_well) in skl_power_well_post_enable() argument
239 if (power_well->data == SKL_DISP_PW_2) { in skl_power_well_post_enable()
248 if (power_well->data == SKL_DISP_PW_1) { in skl_power_well_post_enable()
256 struct i915_power_well *power_well, bool enable) in hsw_set_power_well() argument
587 struct i915_power_well *power_well, bool enable) in skl_set_power_well() argument
597 switch (power_well->data) { in skl_set_power_well()
618 WARN(1, "Unknown power well %lu\n", power_well->data); in skl_set_power_well()
622 req_mask = SKL_POWER_WELL_REQ(power_well->data); in skl_set_power_well()
624 state_mask = SKL_POWER_WELL_STATE(power_well->data); in skl_set_power_well()
634 power_well->data == SKL_DISP_PW_2) { in skl_set_power_well()
652 DRM_DEBUG_KMS("Enabling %s\n", power_well->name); in skl_set_power_well()
656 power_well->name); in skl_set_power_well()
662 (power_well->data == SKL_DISP_PW_1) && in skl_set_power_well()
668 DRM_DEBUG_KMS("Disabling %s\n", power_well->name); in skl_set_power_well()
672 power_well->data == SKL_DISP_PW_2) { in skl_set_power_well()
693 if (power_well->data == SKL_DISP_PW_1) { in skl_set_power_well()
697 } else if (power_well->data == SKL_DISP_PW_2) { in skl_set_power_well()
705 skl_power_well_post_enable(dev_priv, power_well); in skl_set_power_well()
709 struct i915_power_well *power_well) in hsw_power_well_sync_hw() argument
711 hsw_set_power_well(dev_priv, power_well, power_well->count > 0); in hsw_power_well_sync_hw()
722 struct i915_power_well *power_well) in hsw_power_well_enable() argument
724 hsw_set_power_well(dev_priv, power_well, true); in hsw_power_well_enable()
728 struct i915_power_well *power_well) in hsw_power_well_disable() argument
730 hsw_set_power_well(dev_priv, power_well, false); in hsw_power_well_disable()
734 struct i915_power_well *power_well) in skl_power_well_enabled() argument
736 uint32_t mask = SKL_POWER_WELL_REQ(power_well->data) | in skl_power_well_enabled()
737 SKL_POWER_WELL_STATE(power_well->data); in skl_power_well_enabled()
743 struct i915_power_well *power_well) in skl_power_well_sync_hw() argument
745 skl_set_power_well(dev_priv, power_well, power_well->count > 0); in skl_power_well_sync_hw()
752 struct i915_power_well *power_well) in skl_power_well_enable() argument
754 skl_set_power_well(dev_priv, power_well, true); in skl_power_well_enable()
758 struct i915_power_well *power_well) in skl_power_well_disable() argument
760 skl_set_power_well(dev_priv, power_well, false); in skl_power_well_disable()
764 struct i915_power_well *power_well) in i9xx_always_on_power_well_noop() argument
769 struct i915_power_well *power_well) in i9xx_always_on_power_well_enabled() argument
775 struct i915_power_well *power_well, bool enable) in vlv_set_power_well() argument
777 enum punit_power_well power_well_id = power_well->data; in vlv_set_power_well()
811 struct i915_power_well *power_well) in vlv_power_well_sync_hw() argument
813 vlv_set_power_well(dev_priv, power_well, power_well->count > 0); in vlv_power_well_sync_hw()
817 struct i915_power_well *power_well) in vlv_power_well_enable() argument
819 vlv_set_power_well(dev_priv, power_well, true); in vlv_power_well_enable()
823 struct i915_power_well *power_well) in vlv_power_well_disable() argument
825 vlv_set_power_well(dev_priv, power_well, false); in vlv_power_well_disable()
829 struct i915_power_well *power_well) in vlv_power_well_enabled() argument
831 int power_well_id = power_well->data; in vlv_power_well_enabled()
912 struct i915_power_well *power_well) in vlv_display_power_well_enable() argument
914 WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); in vlv_display_power_well_enable()
916 vlv_set_power_well(dev_priv, power_well, true); in vlv_display_power_well_enable()
922 struct i915_power_well *power_well) in vlv_display_power_well_disable() argument
924 WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DISP2D); in vlv_display_power_well_disable()
928 vlv_set_power_well(dev_priv, power_well, false); in vlv_display_power_well_disable()
932 struct i915_power_well *power_well) in vlv_dpio_cmn_power_well_enable() argument
934 WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC); in vlv_dpio_cmn_power_well_enable()
939 vlv_set_power_well(dev_priv, power_well, true); in vlv_dpio_cmn_power_well_enable()
956 struct i915_power_well *power_well) in vlv_dpio_cmn_power_well_disable() argument
960 WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC); in vlv_dpio_cmn_power_well_disable()
968 vlv_set_power_well(dev_priv, power_well, false); in vlv_dpio_cmn_power_well_disable()
977 struct i915_power_well *power_well; in lookup_power_well() local
980 for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) { in lookup_power_well()
981 if (power_well->data == power_well_id) in lookup_power_well()
982 return power_well; in lookup_power_well()
1096 struct i915_power_well *power_well) in chv_dpio_cmn_power_well_enable() argument
1102 WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC && in chv_dpio_cmn_power_well_enable()
1103 power_well->data != PUNIT_POWER_WELL_DPIO_CMN_D); in chv_dpio_cmn_power_well_enable()
1105 if (power_well->data == PUNIT_POWER_WELL_DPIO_CMN_BC) { in chv_dpio_cmn_power_well_enable()
1115 vlv_set_power_well(dev_priv, power_well, true); in chv_dpio_cmn_power_well_enable()
1129 if (power_well->data == PUNIT_POWER_WELL_DPIO_CMN_BC) { in chv_dpio_cmn_power_well_enable()
1156 struct i915_power_well *power_well) in chv_dpio_cmn_power_well_disable() argument
1160 WARN_ON_ONCE(power_well->data != PUNIT_POWER_WELL_DPIO_CMN_BC && in chv_dpio_cmn_power_well_disable()
1161 power_well->data != PUNIT_POWER_WELL_DPIO_CMN_D); in chv_dpio_cmn_power_well_disable()
1163 if (power_well->data == PUNIT_POWER_WELL_DPIO_CMN_BC) { in chv_dpio_cmn_power_well_disable()
1175 vlv_set_power_well(dev_priv, power_well, false); in chv_dpio_cmn_power_well_disable()
1310 struct i915_power_well *power_well) in chv_pipe_power_well_enabled() argument
1312 enum pipe pipe = power_well->data; in chv_pipe_power_well_enabled()
1339 struct i915_power_well *power_well, in chv_set_pipe_power_well() argument
1342 enum pipe pipe = power_well->data; in chv_set_pipe_power_well()
1373 struct i915_power_well *power_well) in chv_pipe_power_well_sync_hw() argument
1375 WARN_ON_ONCE(power_well->data != PIPE_A); in chv_pipe_power_well_sync_hw()
1377 chv_set_pipe_power_well(dev_priv, power_well, power_well->count > 0); in chv_pipe_power_well_sync_hw()
1381 struct i915_power_well *power_well) in chv_pipe_power_well_enable() argument
1383 WARN_ON_ONCE(power_well->data != PIPE_A); in chv_pipe_power_well_enable()
1385 chv_set_pipe_power_well(dev_priv, power_well, true); in chv_pipe_power_well_enable()
1391 struct i915_power_well *power_well) in chv_pipe_power_well_disable() argument
1393 WARN_ON_ONCE(power_well->data != PIPE_A); in chv_pipe_power_well_disable()
1397 chv_set_pipe_power_well(dev_priv, power_well, false); in chv_pipe_power_well_disable()
1416 struct i915_power_well *power_well; in intel_display_power_get() local
1425 for_each_power_well(i, power_well, BIT(domain), power_domains) { in intel_display_power_get()
1426 if (!power_well->count++) in intel_display_power_get()
1427 intel_power_well_enable(dev_priv, power_well); in intel_display_power_get()
1448 struct i915_power_well *power_well; in intel_display_power_put() local
1458 for_each_power_well_rev(i, power_well, BIT(domain), power_domains) { in intel_display_power_put()
1459 WARN_ON(!power_well->count); in intel_display_power_put()
1461 if (!--power_well->count && i915.disable_power_well) in intel_display_power_put()
1462 intel_power_well_disable(dev_priv, power_well); in intel_display_power_put()
1735 struct i915_power_well *power_well; in intel_display_power_well_is_enabled() local
1738 power_well = lookup_power_well(dev_priv, power_well_id); in intel_display_power_well_is_enabled()
1739 ret = power_well->ops->is_enabled(dev_priv, power_well); in intel_display_power_well_is_enabled()
1913 struct i915_power_well *power_well; in intel_power_domains_resume() local
1917 for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) { in intel_power_domains_resume()
1918 power_well->ops->sync_hw(dev_priv, power_well); in intel_power_domains_resume()
1919 power_well->hw_enabled = power_well->ops->is_enabled(dev_priv, in intel_power_domains_resume()
1920 power_well); in intel_power_domains_resume()