Lines Matching refs:mmio_base
461 acthd = I915_READ64_2x32(RING_ACTHD(ring->mmio_base), in intel_ring_get_active_head()
462 RING_ACTHD_UDW(ring->mmio_base)); in intel_ring_get_active_head()
464 acthd = I915_READ(RING_ACTHD(ring->mmio_base)); in intel_ring_get_active_head()
512 mmio = RING_HWS_PGA_GEN6(ring->mmio_base); in intel_ring_setup_status_page()
515 mmio = RING_HWS_PGA(ring->mmio_base); in intel_ring_setup_status_page()
529 u32 reg = RING_INSTPM(ring->mmio_base); in intel_ring_setup_status_page()
1519 POSTING_READ(RING_ACTHD(ring->mmio_base)); in gen6_ring_get_seqno()
1788 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_ring_get_irq()
1810 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_ring_put_irq()
2436 I915_WRITE(RING_SYNC_0(ring->mmio_base), 0); in intel_ring_init_seqno()
2437 I915_WRITE(RING_SYNC_1(ring->mmio_base), 0); in intel_ring_init_seqno()
2439 I915_WRITE(RING_SYNC_2(ring->mmio_base), 0); in intel_ring_init_seqno()
2470 POSTING_READ(RING_TAIL(ring->mmio_base)); in gen6_bsd_ring_write_tail()
2653 ring->mmio_base = RENDER_RING_BASE; in intel_init_render_ring_buffer()
2804 ring->mmio_base = GEN6_BSD_RING_BASE; in intel_init_bsd_ring_buffer()
2846 ring->mmio_base = BSD_RING_BASE; in intel_init_bsd_ring_buffer()
2879 ring->mmio_base = GEN8_BSD2_RING_BASE; in intel_init_bsd2_ring_buffer()
2908 ring->mmio_base = BLT_RING_BASE; in intel_init_blt_ring_buffer()
2965 ring->mmio_base = VEBOX_RING_BASE; in intel_init_vebox_ring_buffer()