Lines Matching refs:irq_enable_mask

1561 		gen5_enable_gt_irq(dev_priv, ring->irq_enable_mask);  in gen5_ring_get_irq()
1576 gen5_disable_gt_irq(dev_priv, ring->irq_enable_mask); in gen5_ring_put_irq()
1592 dev_priv->irq_mask &= ~ring->irq_enable_mask; in i9xx_ring_get_irq()
1610 dev_priv->irq_mask |= ring->irq_enable_mask; in i9xx_ring_put_irq()
1629 dev_priv->irq_mask &= ~ring->irq_enable_mask; in i8xx_ring_get_irq()
1647 dev_priv->irq_mask |= ring->irq_enable_mask; in i8xx_ring_put_irq()
1705 ~(ring->irq_enable_mask | in gen6_ring_get_irq()
1708 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in gen6_ring_get_irq()
1709 gen5_enable_gt_irq(dev_priv, ring->irq_enable_mask); in gen6_ring_get_irq()
1729 gen5_disable_gt_irq(dev_priv, ring->irq_enable_mask); in gen6_ring_put_irq()
1746 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in hsw_vebox_get_irq()
1747 gen6_enable_pm_irq(dev_priv, ring->irq_enable_mask); in hsw_vebox_get_irq()
1764 gen6_disable_pm_irq(dev_priv, ring->irq_enable_mask); in hsw_vebox_put_irq()
1783 ~(ring->irq_enable_mask | in gen8_ring_get_irq()
1786 I915_WRITE_IMR(ring, ~ring->irq_enable_mask); in gen8_ring_get_irq()
2678 ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT; in intel_init_render_ring_buffer()
2695 ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT; in intel_init_render_ring_buffer()
2726 ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT | in intel_init_render_ring_buffer()
2743 ring->irq_enable_mask = I915_USER_INTERRUPT; in intel_init_render_ring_buffer()
2813 ring->irq_enable_mask = in intel_init_bsd_ring_buffer()
2825 ring->irq_enable_mask = GT_BSD_USER_INTERRUPT; in intel_init_bsd_ring_buffer()
2852 ring->irq_enable_mask = ILK_BSD_USER_INTERRUPT; in intel_init_bsd_ring_buffer()
2856 ring->irq_enable_mask = I915_BSD_USER_INTERRUPT; in intel_init_bsd_ring_buffer()
2884 ring->irq_enable_mask = in intel_init_bsd2_ring_buffer()
2915 ring->irq_enable_mask = in intel_init_blt_ring_buffer()
2926 ring->irq_enable_mask = GT_BLT_USER_INTERRUPT; in intel_init_blt_ring_buffer()
2973 ring->irq_enable_mask = in intel_init_vebox_ring_buffer()
2984 ring->irq_enable_mask = PM_VEBOX_USER_INTERRUPT; in intel_init_vebox_ring_buffer()