Lines Matching refs:port
49 static void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port) in wait_for_dsi_fifo_empty() argument
59 if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & mask) == mask, 100)) in wait_for_dsi_fifo_empty()
97 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer() local
111 data_reg = MIPI_LP_GEN_DATA(port); in intel_dsi_host_transfer()
113 ctrl_reg = MIPI_LP_GEN_CTRL(port); in intel_dsi_host_transfer()
116 data_reg = MIPI_HS_GEN_DATA(port); in intel_dsi_host_transfer()
118 ctrl_reg = MIPI_HS_GEN_CTRL(port); in intel_dsi_host_transfer()
125 if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & data_mask) == 0, 50)) in intel_dsi_host_transfer()
133 I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL); in intel_dsi_host_transfer()
136 if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & ctrl_mask) == 0, 50)) { in intel_dsi_host_transfer()
145 if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & data_mask) == data_mask, 50)) in intel_dsi_host_transfer()
174 enum port port) in intel_dsi_host_init() argument
185 host->port = port; in intel_dsi_host_init()
212 enum port port) in dpi_send_cmd() argument
226 I915_WRITE(MIPI_INTR_STAT(port), SPL_PKT_SENT_INTERRUPT); in dpi_send_cmd()
229 if (cmd == I915_READ(MIPI_DPI_CONTROL(port))) in dpi_send_cmd()
232 I915_WRITE(MIPI_DPI_CONTROL(port), cmd); in dpi_send_cmd()
235 if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & mask) == mask, 100)) in dpi_send_cmd()
289 enum port port; in bxt_dsi_device_ready() local
295 for_each_dsi_port(port, intel_dsi->ports) { in bxt_dsi_device_ready()
298 val = I915_READ(BXT_MIPI_PORT_CTRL(port)); in bxt_dsi_device_ready()
299 I915_WRITE(BXT_MIPI_PORT_CTRL(port), val | LP_OUTPUT_HOLD); in bxt_dsi_device_ready()
303 val = I915_READ(MIPI_DEVICE_READY(port)); in bxt_dsi_device_ready()
306 I915_WRITE(MIPI_DEVICE_READY(port), val); in bxt_dsi_device_ready()
310 val = I915_READ(MIPI_DEVICE_READY(port)); in bxt_dsi_device_ready()
313 I915_WRITE(MIPI_DEVICE_READY(port), val); in bxt_dsi_device_ready()
317 val = I915_READ(MIPI_DEVICE_READY(port)); in bxt_dsi_device_ready()
320 I915_WRITE(MIPI_DEVICE_READY(port), val); in bxt_dsi_device_ready()
328 enum port port; in vlv_dsi_device_ready() local
342 for_each_dsi_port(port, intel_dsi->ports) { in vlv_dsi_device_ready()
344 I915_WRITE(MIPI_DEVICE_READY(port), ULPS_STATE_ENTER); in vlv_dsi_device_ready()
355 I915_WRITE(MIPI_DEVICE_READY(port), ULPS_STATE_EXIT); in vlv_dsi_device_ready()
358 I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY); in vlv_dsi_device_ready()
379 enum port port; in intel_dsi_port_enable() local
391 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_port_enable()
392 port_ctrl = IS_BROXTON(dev) ? BXT_MIPI_PORT_CTRL(port) : in intel_dsi_port_enable()
393 MIPI_PORT_CTRL(port); in intel_dsi_port_enable()
418 enum port port; in intel_dsi_port_disable() local
422 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_port_disable()
424 port_ctrl = IS_BROXTON(dev) ? BXT_MIPI_PORT_CTRL(port) : in intel_dsi_port_disable()
425 MIPI_PORT_CTRL(port); in intel_dsi_port_disable()
437 enum port port; in intel_dsi_enable() local
442 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_enable()
443 I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(port), 8 * 4); in intel_dsi_enable()
446 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_enable()
447 dpi_send_cmd(intel_dsi, TURN_ON, false, port); in intel_dsi_enable()
452 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_enable()
453 wait_for_dsi_fifo_empty(intel_dsi, port); in intel_dsi_enable()
468 enum port port; in intel_dsi_pre_enable() local
503 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_pre_enable()
504 wait_for_dsi_fifo_empty(intel_dsi, port); in intel_dsi_pre_enable()
524 enum port port; in intel_dsi_pre_disable() local
532 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_pre_disable()
533 dpi_send_cmd(intel_dsi, SHUTDOWN, false, port); in intel_dsi_pre_disable()
543 enum port port; in intel_dsi_disable() local
549 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_disable()
550 wait_for_dsi_fifo_empty(intel_dsi, port); in intel_dsi_disable()
556 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_disable()
558 I915_WRITE(MIPI_DEVICE_READY(port), 0x0); in intel_dsi_disable()
560 intel_dsi_reset_clocks(encoder, port); in intel_dsi_disable()
561 I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP); in intel_dsi_disable()
563 temp = I915_READ(MIPI_DSI_FUNC_PRG(port)); in intel_dsi_disable()
565 I915_WRITE(MIPI_DSI_FUNC_PRG(port), temp); in intel_dsi_disable()
567 I915_WRITE(MIPI_DEVICE_READY(port), 0x1); in intel_dsi_disable()
573 for_each_dsi_port(port, intel_dsi->ports) in intel_dsi_disable()
574 wait_for_dsi_fifo_empty(intel_dsi, port); in intel_dsi_disable()
582 enum port port; in intel_dsi_clear_device_ready() local
587 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_clear_device_ready()
589 I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY | in intel_dsi_clear_device_ready()
593 I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY | in intel_dsi_clear_device_ready()
597 I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY | in intel_dsi_clear_device_ready()
602 port_ctrl = BXT_MIPI_PORT_CTRL(port); in intel_dsi_clear_device_ready()
619 I915_WRITE(MIPI_DEVICE_READY(port), 0x00); in intel_dsi_clear_device_ready()
660 enum port port; in intel_dsi_get_hw_state() local
669 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_get_hw_state()
670 func = I915_READ(MIPI_DSI_FUNC_PRG(port)); in intel_dsi_get_hw_state()
671 ctrl_reg = IS_BROXTON(dev) ? BXT_MIPI_PORT_CTRL(port) : in intel_dsi_get_hw_state()
672 MIPI_PORT_CTRL(port); in intel_dsi_get_hw_state()
680 (port == PORT_C)) in intel_dsi_get_hw_state()
685 if (I915_READ(MIPI_DEVICE_READY(port)) & DEVICE_READY) { in intel_dsi_get_hw_state()
686 *pipe = port == PORT_A ? PIPE_A : PIPE_B; in intel_dsi_get_hw_state()
775 enum port port; in set_dsi_timings() local
807 for_each_dsi_port(port, intel_dsi->ports) { in set_dsi_timings()
815 I915_WRITE(BXT_MIPI_TRANS_HACTIVE(port), in set_dsi_timings()
817 I915_WRITE(BXT_MIPI_TRANS_VACTIVE(port), in set_dsi_timings()
819 I915_WRITE(BXT_MIPI_TRANS_VTOTAL(port), in set_dsi_timings()
823 I915_WRITE(MIPI_HACTIVE_AREA_COUNT(port), hactive); in set_dsi_timings()
824 I915_WRITE(MIPI_HFP_COUNT(port), hfp); in set_dsi_timings()
828 I915_WRITE(MIPI_HSYNC_PADDING_COUNT(port), hsync); in set_dsi_timings()
829 I915_WRITE(MIPI_HBP_COUNT(port), hbp); in set_dsi_timings()
832 I915_WRITE(MIPI_VFP_COUNT(port), vfp); in set_dsi_timings()
833 I915_WRITE(MIPI_VSYNC_PADDING_COUNT(port), vsync); in set_dsi_timings()
834 I915_WRITE(MIPI_VBP_COUNT(port), vbp); in set_dsi_timings()
846 enum port port; in intel_dsi_prepare() local
861 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_prepare()
873 tmp = I915_READ(MIPI_CTRL(port)); in intel_dsi_prepare()
875 I915_WRITE(MIPI_CTRL(port), tmp | in intel_dsi_prepare()
885 tmp = I915_READ(MIPI_CTRL(port)); in intel_dsi_prepare()
888 if (port == PORT_A) in intel_dsi_prepare()
890 else if (port == PORT_C) in intel_dsi_prepare()
893 I915_WRITE(MIPI_CTRL(port), tmp); in intel_dsi_prepare()
897 I915_WRITE(MIPI_INTR_STAT(port), 0xffffffff); in intel_dsi_prepare()
898 I915_WRITE(MIPI_INTR_EN(port), 0xffffffff); in intel_dsi_prepare()
900 I915_WRITE(MIPI_DPHY_PARAM(port), intel_dsi->dphy_reg); in intel_dsi_prepare()
902 I915_WRITE(MIPI_DPI_RESOLUTION(port), in intel_dsi_prepare()
926 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_prepare()
927 I915_WRITE(MIPI_DSI_FUNC_PRG(port), val); in intel_dsi_prepare()
948 I915_WRITE(MIPI_HS_TX_TIMEOUT(port), in intel_dsi_prepare()
953 I915_WRITE(MIPI_HS_TX_TIMEOUT(port), in intel_dsi_prepare()
959 I915_WRITE(MIPI_LP_RX_TIMEOUT(port), intel_dsi->lp_rx_timeout); in intel_dsi_prepare()
960 I915_WRITE(MIPI_TURN_AROUND_TIMEOUT(port), in intel_dsi_prepare()
962 I915_WRITE(MIPI_DEVICE_RESET_TIMER(port), in intel_dsi_prepare()
968 I915_WRITE(MIPI_INIT_COUNT(port), in intel_dsi_prepare()
978 I915_WRITE(MIPI_INIT_COUNT(port == in intel_dsi_prepare()
984 I915_WRITE(MIPI_EOT_DISABLE(port), tmp); in intel_dsi_prepare()
987 I915_WRITE(MIPI_INIT_COUNT(port), intel_dsi->init_count); in intel_dsi_prepare()
994 I915_WRITE(MIPI_HIGH_LOW_SWITCH_COUNT(port), in intel_dsi_prepare()
1003 I915_WRITE(MIPI_LP_BYTECLK(port), intel_dsi->lp_byte_clk); in intel_dsi_prepare()
1010 I915_WRITE(MIPI_DBI_BW_CTRL(port), intel_dsi->bw_timer); in intel_dsi_prepare()
1012 I915_WRITE(MIPI_CLK_LANE_SWITCH_TIME_CNT(port), in intel_dsi_prepare()
1020 I915_WRITE(MIPI_VIDEO_MODE_FORMAT(port), in intel_dsi_prepare()
1122 enum port port; in intel_dsi_init() local
1170 if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIA) { in intel_dsi_init()
1173 } else if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIC) { in intel_dsi_init()
1182 for_each_dsi_port(port, intel_dsi->ports) { in intel_dsi_init()
1185 host = intel_dsi_host_init(intel_dsi, port); in intel_dsi_init()
1189 intel_dsi->dsi_hosts[port] = host; in intel_dsi_init()