272 	struct drm_display_mode *adjusted_mode = &config->base.adjusted_mode;  in intel_dsi_compute_config()  local
277 		intel_fixed_panel_mode(fixed_mode, adjusted_mode);  in intel_dsi_compute_config()
280 	adjusted_mode->flags = 0;  in intel_dsi_compute_config()
715 	pipe_config->base.adjusted_mode.crtc_clock = pclk;  in intel_dsi_get_config()
769 			    const struct drm_display_mode *adjusted_mode)  in set_dsi_timings()  argument
781 	hactive = adjusted_mode->crtc_hdisplay;  in set_dsi_timings()
782 	hfp = adjusted_mode->crtc_hsync_start - adjusted_mode->crtc_hdisplay;  in set_dsi_timings()
783 	hsync = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;  in set_dsi_timings()
784 	hbp = adjusted_mode->crtc_htotal - adjusted_mode->crtc_hsync_end;  in set_dsi_timings()
795 	vfp = adjusted_mode->crtc_vsync_start - adjusted_mode->crtc_vdisplay;  in set_dsi_timings()
796 	vsync = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;  in set_dsi_timings()
797 	vbp = adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vsync_end;  in set_dsi_timings()
816 				   adjusted_mode->crtc_hdisplay);  in set_dsi_timings()
818 				   adjusted_mode->crtc_vdisplay);  in set_dsi_timings()
820 				   adjusted_mode->crtc_vtotal);  in set_dsi_timings()
845 	const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode;  in intel_dsi_prepare()  local
853 	mode_hdisplay = adjusted_mode->crtc_hdisplay;  in intel_dsi_prepare()
903 			adjusted_mode->crtc_vdisplay << VERTICAL_ADDRESS_SHIFT |  in intel_dsi_prepare()
907 	set_dsi_timings(encoder, adjusted_mode);  in intel_dsi_prepare()
949 				txbyteclkhs(adjusted_mode->crtc_htotal, bpp,  in intel_dsi_prepare()
954 				txbyteclkhs(adjusted_mode->crtc_vtotal *  in intel_dsi_prepare()
955 					    adjusted_mode->crtc_htotal,  in intel_dsi_prepare()