856 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_get_crtc_for_pipe()  local
857 	return dev_priv->pipe_to_crtc_mapping[pipe];  in intel_get_crtc_for_pipe()
863 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_get_crtc_for_plane()  local
864 	return dev_priv->plane_to_crtc_mapping[plane];  in intel_get_crtc_for_plane()
936 bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
938 bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
941 void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
943 void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
945 void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv);
948 void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
949 void gen5_disable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
950 void gen6_enable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
951 void gen6_disable_pm_irq(struct drm_i915_private *dev_priv, uint32_t mask);
955 u32 gen6_sanitize_rps_pm_mask(struct drm_i915_private *dev_priv, u32 mask);
956 void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv);
957 void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv);
958 static inline bool intel_irqs_enabled(struct drm_i915_private *dev_priv)  in intel_irqs_enabled()  argument
964 	return dev_priv->pm.irqs_enabled;  in intel_irqs_enabled()
968 void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
983 void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
1026 void i915_audio_component_init(struct drm_i915_private *dev_priv);
1027 void i915_audio_component_cleanup(struct drm_i915_private *dev_priv);
1050 enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv,
1059 void vlv_wait_port_ready(struct drm_i915_private *dev_priv,
1112 void assert_shared_dpll(struct drm_i915_private *dev_priv,
1125 void assert_panel_unlocked(struct drm_i915_private *dev_priv,
1127 void assert_pll(struct drm_i915_private *dev_priv,
1131 void assert_fdi_rx_pll(struct drm_i915_private *dev_priv,
1135 void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, bool state);
1138 unsigned long intel_gen4_compute_page_offset(struct drm_i915_private *dev_priv,
1145 void hsw_enable_pc8(struct drm_i915_private *dev_priv);
1146 void hsw_disable_pc8(struct drm_i915_private *dev_priv);
1151 void bxt_enable_dc9(struct drm_i915_private *dev_priv);
1152 void bxt_disable_dc9(struct drm_i915_private *dev_priv);
1153 void skl_init_cdclk(struct drm_i915_private *dev_priv);
1154 void skl_uninit_cdclk(struct drm_i915_private *dev_priv);
1191 enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv);
1192 void intel_csr_load_status_set(struct drm_i915_private *dev_priv,
1196 void assert_csr_loaded(struct drm_i915_private *dev_priv);
1227 void vlv_power_sequencer_reset(struct drm_i915_private *dev_priv);
1235 bool intel_digital_port_connected(struct drm_i915_private *dev_priv,
1282 bool intel_fbc_enabled(struct drm_i915_private *dev_priv);
1283 void intel_fbc_update(struct drm_i915_private *dev_priv);
1284 void intel_fbc_init(struct drm_i915_private *dev_priv);
1285 void intel_fbc_disable(struct drm_i915_private *dev_priv);
1287 void intel_fbc_invalidate(struct drm_i915_private *dev_priv,
1290 void intel_fbc_flush(struct drm_i915_private *dev_priv,
1293 void intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv);
1326 void intel_overlay_reset(struct drm_i915_private *dev_priv);
1372 void intel_power_domains_init_hw(struct drm_i915_private *dev_priv);
1373 void intel_runtime_pm_enable(struct drm_i915_private *dev_priv);
1375 bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
1377 bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
1379 void intel_display_power_get(struct drm_i915_private *dev_priv,
1381 void intel_display_power_put(struct drm_i915_private *dev_priv,
1383 void intel_runtime_pm_get(struct drm_i915_private *dev_priv);
1384 void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv);
1385 void intel_runtime_pm_put(struct drm_i915_private *dev_priv);
1391 bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
1408 void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
1417 void gen6_rps_busy(struct drm_i915_private *dev_priv);
1418 void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);
1419 void gen6_rps_idle(struct drm_i915_private *dev_priv);
1420 void gen6_rps_boost(struct drm_i915_private *dev_priv,
1428 void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,