1680 	u32 pp_stat_reg, pp_ctrl_reg;  in wait_panel_status()  local
1684 	pp_stat_reg = _pp_stat_reg(intel_dp);  in wait_panel_status()
1689 			I915_READ(pp_stat_reg),  in wait_panel_status()
1692 	if (_wait_for((I915_READ(pp_stat_reg) & mask) == value, 5000, 10)) {  in wait_panel_status()
1694 				I915_READ(pp_stat_reg),  in wait_panel_status()
1770 	u32 pp_stat_reg, pp_ctrl_reg;  in edp_panel_vdd_on()  local
1796 	pp_stat_reg = _pp_stat_reg(intel_dp);  in edp_panel_vdd_on()
1802 			I915_READ(pp_stat_reg), I915_READ(pp_ctrl_reg));  in edp_panel_vdd_on()
1846 	u32 pp_stat_reg, pp_ctrl_reg;  in edp_panel_vdd_off_sync()  local
1862 	pp_stat_reg = _pp_stat_reg(intel_dp);  in edp_panel_vdd_off_sync()
1869 	I915_READ(pp_stat_reg), I915_READ(pp_ctrl_reg));  in edp_panel_vdd_off_sync()