1769 	u32 pp;  in edp_panel_vdd_on()  local
1793 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_vdd_on()
1794 	pp |= EDP_FORCE_VDD;  in edp_panel_vdd_on()
1799 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_vdd_on()
1845 	u32 pp;  in edp_panel_vdd_off_sync()  local
1858 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_vdd_off_sync()
1859 	pp &= ~EDP_FORCE_VDD;  in edp_panel_vdd_off_sync()
1864 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_vdd_off_sync()
1871 	if ((pp & POWER_TARGET_ON) == 0)  in edp_panel_vdd_off_sync()
1932 	u32 pp;  in edp_panel_on()  local
1951 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_on()
1954 		pp &= ~PANEL_POWER_RESET;  in edp_panel_on()
1955 		I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_on()
1959 	pp |= POWER_TARGET_ON;  in edp_panel_on()
1961 		pp |= PANEL_POWER_RESET;  in edp_panel_on()
1963 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_on()
1970 		pp |= PANEL_POWER_RESET; /* restore panel reset bit */  in edp_panel_on()
1971 		I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_on()
1994 	u32 pp;  in edp_panel_off()  local
2008 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_off()
2011 	pp &= ~(POWER_TARGET_ON | PANEL_POWER_RESET | EDP_FORCE_VDD |  in edp_panel_off()
2018 	I915_WRITE(pp_ctrl_reg, pp);  in edp_panel_off()
2045 	u32 pp;  in _intel_edp_backlight_on()  local
2058 	pp = ironlake_get_pp_control(intel_dp);  in _intel_edp_backlight_on()
2059 	pp |= EDP_BLC_ENABLE;  in _intel_edp_backlight_on()
2063 	I915_WRITE(pp_ctrl_reg, pp);  in _intel_edp_backlight_on()
2086 	u32 pp;  in _intel_edp_backlight_off()  local
2094 	pp = ironlake_get_pp_control(intel_dp);  in _intel_edp_backlight_off()
2095 	pp &= ~EDP_BLC_ENABLE;  in _intel_edp_backlight_off()
2099 	I915_WRITE(pp_ctrl_reg, pp);  in _intel_edp_backlight_off()