3047 intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE])  in intel_dp_get_link_status()
3051 				       link_status,  in intel_dp_get_link_status()
3423 		       const uint8_t link_status[DP_LINK_STATUS_SIZE])  in intel_get_adjust_train()
3432 		uint8_t this_v = drm_dp_get_adjust_request_voltage(link_status, lane);  in intel_get_adjust_train()
3433 		uint8_t this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, lane);  in intel_get_adjust_train()
3639 			   const uint8_t link_status[DP_LINK_STATUS_SIZE])  in intel_dp_update_link_train()
3646 	intel_get_adjust_train(intel_dp, link_status);  in intel_dp_update_link_train()
3736 		uint8_t link_status[DP_LINK_STATUS_SIZE];  in intel_dp_link_training_clock_recovery()  local
3739 		if (!intel_dp_get_link_status(intel_dp, link_status)) {  in intel_dp_link_training_clock_recovery()
3744 		if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) {  in intel_dp_link_training_clock_recovery()
3795 		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {  in intel_dp_link_training_clock_recovery()
3841 		uint8_t link_status[DP_LINK_STATUS_SIZE];  in intel_dp_link_training_channel_equalization()  local
3849 		if (!intel_dp_get_link_status(intel_dp, link_status)) {  in intel_dp_link_training_channel_equalization()
3855 		if (!drm_dp_clock_recovery_ok(link_status,  in intel_dp_link_training_channel_equalization()
3866 		if (drm_dp_channel_eq_ok(link_status,  in intel_dp_link_training_channel_equalization()
3885 		if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) {  in intel_dp_link_training_channel_equalization()
4435 	u8 link_status[DP_LINK_STATUS_SIZE];  in intel_dp_check_link_status()  local
4446 	if (!intel_dp_get_link_status(intel_dp, link_status)) {  in intel_dp_check_link_status()
4469 	if (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) {  in intel_dp_check_link_status()