Lines Matching refs:intel_dp
107 static bool is_edp(struct intel_dp *intel_dp) in is_edp() argument
109 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in is_edp()
114 static struct drm_device *intel_dp_to_dev(struct intel_dp *intel_dp) in intel_dp_to_dev() argument
116 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_to_dev()
121 static struct intel_dp *intel_attached_dp(struct drm_connector *connector) in intel_attached_dp()
126 static void intel_dp_link_down(struct intel_dp *intel_dp);
127 static bool edp_panel_vdd_on(struct intel_dp *intel_dp);
128 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
129 static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp);
139 intel_dp_max_link_bw(struct intel_dp *intel_dp) in intel_dp_max_link_bw() argument
141 int max_link_bw = intel_dp->dpcd[DP_MAX_LINK_RATE]; in intel_dp_max_link_bw()
157 static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp) in intel_dp_max_lane_count() argument
159 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_max_lane_count()
168 sink_max = drm_dp_max_lane_count(intel_dp->dpcd); in intel_dp_max_lane_count()
206 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_mode_valid() local
212 if (is_edp(intel_dp) && fixed_mode) { in intel_dp_mode_valid()
222 max_link_clock = intel_dp_max_link_rate(intel_dp); in intel_dp_mode_valid()
223 max_lanes = intel_dp_max_lane_count(intel_dp); in intel_dp_mode_valid()
263 struct intel_dp *intel_dp);
266 struct intel_dp *intel_dp);
268 static void pps_lock(struct intel_dp *intel_dp) in pps_lock() argument
270 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in pps_lock()
286 static void pps_unlock(struct intel_dp *intel_dp) in pps_unlock() argument
288 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in pps_unlock()
301 vlv_power_sequencer_kick(struct intel_dp *intel_dp) in vlv_power_sequencer_kick() argument
303 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_power_sequencer_kick()
306 enum pipe pipe = intel_dp->pps_pipe; in vlv_power_sequencer_kick()
312 if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN, in vlv_power_sequencer_kick()
323 DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in vlv_power_sequencer_kick()
353 I915_WRITE(intel_dp->output_reg, DP); in vlv_power_sequencer_kick()
354 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
356 I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN); in vlv_power_sequencer_kick()
357 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
359 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in vlv_power_sequencer_kick()
360 POSTING_READ(intel_dp->output_reg); in vlv_power_sequencer_kick()
371 vlv_power_sequencer_pipe(struct intel_dp *intel_dp) in vlv_power_sequencer_pipe() argument
373 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_power_sequencer_pipe()
383 WARN_ON(!is_edp(intel_dp)); in vlv_power_sequencer_pipe()
385 if (intel_dp->pps_pipe != INVALID_PIPE) in vlv_power_sequencer_pipe()
386 return intel_dp->pps_pipe; in vlv_power_sequencer_pipe()
394 struct intel_dp *tmp; in vlv_power_sequencer_pipe()
415 intel_dp->pps_pipe = pipe; in vlv_power_sequencer_pipe()
418 pipe_name(intel_dp->pps_pipe), in vlv_power_sequencer_pipe()
422 intel_dp_init_panel_power_sequencer(dev, intel_dp); in vlv_power_sequencer_pipe()
423 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in vlv_power_sequencer_pipe()
429 vlv_power_sequencer_kick(intel_dp); in vlv_power_sequencer_pipe()
431 return intel_dp->pps_pipe; in vlv_power_sequencer_pipe()
479 vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp) in vlv_initial_power_sequencer_setup() argument
481 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_initial_power_sequencer_setup()
490 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
493 if (intel_dp->pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
494 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
497 if (intel_dp->pps_pipe == INVALID_PIPE) in vlv_initial_power_sequencer_setup()
498 intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port, in vlv_initial_power_sequencer_setup()
502 if (intel_dp->pps_pipe == INVALID_PIPE) { in vlv_initial_power_sequencer_setup()
509 port_name(port), pipe_name(intel_dp->pps_pipe)); in vlv_initial_power_sequencer_setup()
511 intel_dp_init_panel_power_sequencer(dev, intel_dp); in vlv_initial_power_sequencer_setup()
512 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in vlv_initial_power_sequencer_setup()
534 struct intel_dp *intel_dp; in vlv_power_sequencer_reset() local
539 intel_dp = enc_to_intel_dp(&encoder->base); in vlv_power_sequencer_reset()
540 intel_dp->pps_pipe = INVALID_PIPE; in vlv_power_sequencer_reset()
544 static u32 _pp_ctrl_reg(struct intel_dp *intel_dp) in _pp_ctrl_reg() argument
546 struct drm_device *dev = intel_dp_to_dev(intel_dp); in _pp_ctrl_reg()
553 return VLV_PIPE_PP_CONTROL(vlv_power_sequencer_pipe(intel_dp)); in _pp_ctrl_reg()
556 static u32 _pp_stat_reg(struct intel_dp *intel_dp) in _pp_stat_reg() argument
558 struct drm_device *dev = intel_dp_to_dev(intel_dp); in _pp_stat_reg()
565 return VLV_PIPE_PP_STATUS(vlv_power_sequencer_pipe(intel_dp)); in _pp_stat_reg()
573 struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp), in edp_notify_handler() local
575 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_notify_handler()
578 if (!is_edp(intel_dp) || code != SYS_RESTART) in edp_notify_handler()
581 pps_lock(intel_dp); in edp_notify_handler()
584 enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); in edp_notify_handler()
596 msleep(intel_dp->panel_power_cycle_delay); in edp_notify_handler()
599 pps_unlock(intel_dp); in edp_notify_handler()
604 static bool edp_have_panel_power(struct intel_dp *intel_dp) in edp_have_panel_power() argument
606 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_have_panel_power()
612 intel_dp->pps_pipe == INVALID_PIPE) in edp_have_panel_power()
615 return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0; in edp_have_panel_power()
618 static bool edp_have_panel_vdd(struct intel_dp *intel_dp) in edp_have_panel_vdd() argument
620 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_have_panel_vdd()
626 intel_dp->pps_pipe == INVALID_PIPE) in edp_have_panel_vdd()
629 return I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD; in edp_have_panel_vdd()
633 intel_dp_check_edp(struct intel_dp *intel_dp) in intel_dp_check_edp() argument
635 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_check_edp()
638 if (!is_edp(intel_dp)) in intel_dp_check_edp()
641 if (!edp_have_panel_power(intel_dp) && !edp_have_panel_vdd(intel_dp)) { in intel_dp_check_edp()
644 I915_READ(_pp_stat_reg(intel_dp)), in intel_dp_check_edp()
645 I915_READ(_pp_ctrl_reg(intel_dp))); in intel_dp_check_edp()
650 intel_dp_aux_wait_done(struct intel_dp *intel_dp, bool has_aux_irq) in intel_dp_aux_wait_done() argument
652 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_aux_wait_done()
655 uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg; in intel_dp_aux_wait_done()
673 static uint32_t i9xx_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in i9xx_get_aux_clock_divider() argument
675 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in i9xx_get_aux_clock_divider()
685 static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in ilk_get_aux_clock_divider() argument
687 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ilk_get_aux_clock_divider()
702 static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in hsw_get_aux_clock_divider() argument
704 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in hsw_get_aux_clock_divider()
724 static uint32_t vlv_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in vlv_get_aux_clock_divider() argument
729 static uint32_t skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index) in skl_get_aux_clock_divider() argument
739 static uint32_t i9xx_get_aux_send_ctl(struct intel_dp *intel_dp, in i9xx_get_aux_send_ctl() argument
744 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in i9xx_get_aux_send_ctl()
753 if (IS_BROADWELL(dev) && intel_dp->aux_ch_ctl_reg == DPA_AUX_CH_CTL) in i9xx_get_aux_send_ctl()
769 static uint32_t skl_get_aux_send_ctl(struct intel_dp *intel_dp, in skl_get_aux_send_ctl() argument
785 intel_dp_aux_ch(struct intel_dp *intel_dp, in intel_dp_aux_ch() argument
789 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_aux_ch()
792 uint32_t ch_ctl = intel_dp->aux_ch_ctl_reg; in intel_dp_aux_ch()
801 pps_lock(intel_dp); in intel_dp_aux_ch()
809 vdd = edp_panel_vdd_on(intel_dp); in intel_dp_aux_ch()
817 intel_dp_check_edp(intel_dp); in intel_dp_aux_ch()
847 while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) { in intel_dp_aux_ch()
848 u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp, in intel_dp_aux_ch()
864 status = intel_dp_aux_wait_done(intel_dp, has_aux_irq); in intel_dp_aux_ch()
929 edp_panel_vdd_off(intel_dp, false); in intel_dp_aux_ch()
931 pps_unlock(intel_dp); in intel_dp_aux_ch()
941 struct intel_dp *intel_dp = container_of(aux, struct intel_dp, aux); in intel_dp_aux_transfer() local
964 ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize); in intel_dp_aux_transfer()
986 ret = intel_dp_aux_ch(intel_dp, txbuf, txsize, rxbuf, rxsize); in intel_dp_aux_transfer()
1009 intel_dp_aux_init(struct intel_dp *intel_dp, struct intel_connector *connector) in intel_dp_aux_init() argument
1011 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_aux_init()
1013 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_aux_init()
1042 intel_dp->aux_ch_ctl_reg = DPA_AUX_CH_CTL; in intel_dp_aux_init()
1046 intel_dp->aux_ch_ctl_reg = PCH_DPB_AUX_CH_CTL; in intel_dp_aux_init()
1050 intel_dp->aux_ch_ctl_reg = PCH_DPC_AUX_CH_CTL; in intel_dp_aux_init()
1054 intel_dp->aux_ch_ctl_reg = PCH_DPD_AUX_CH_CTL; in intel_dp_aux_init()
1058 intel_dp->aux_ch_ctl_reg = porte_aux_ctl_reg; in intel_dp_aux_init()
1075 intel_dp->aux_ch_ctl_reg = intel_dp->output_reg + 0x10; in intel_dp_aux_init()
1077 intel_dp->aux.name = name; in intel_dp_aux_init()
1078 intel_dp->aux.dev = dev->dev; in intel_dp_aux_init()
1079 intel_dp->aux.transfer = intel_dp_aux_transfer; in intel_dp_aux_init()
1084 ret = drm_dp_aux_register(&intel_dp->aux); in intel_dp_aux_init()
1092 &intel_dp->aux.ddc.dev.kobj, in intel_dp_aux_init()
1093 intel_dp->aux.ddc.dev.kobj.name); in intel_dp_aux_init()
1096 drm_dp_aux_unregister(&intel_dp->aux); in intel_dp_aux_init()
1103 struct intel_dp *intel_dp = intel_attached_dp(&intel_connector->base); in intel_dp_connector_unregister() local
1107 intel_dp->aux.ddc.dev.kobj.name); in intel_dp_connector_unregister()
1177 intel_dp_sink_rates(struct intel_dp *intel_dp, const int **sink_rates) in intel_dp_sink_rates() argument
1179 if (intel_dp->num_sink_rates) { in intel_dp_sink_rates()
1180 *sink_rates = intel_dp->sink_rates; in intel_dp_sink_rates()
1181 return intel_dp->num_sink_rates; in intel_dp_sink_rates()
1186 return (intel_dp_max_link_bw(intel_dp) >> 3) + 1; in intel_dp_sink_rates()
1281 static int intel_dp_common_rates(struct intel_dp *intel_dp, in intel_dp_common_rates() argument
1284 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_common_rates()
1288 sink_len = intel_dp_sink_rates(intel_dp, &sink_rates); in intel_dp_common_rates()
1312 static void intel_dp_print_rates(struct intel_dp *intel_dp) in intel_dp_print_rates() argument
1314 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_print_rates()
1327 sink_len = intel_dp_sink_rates(intel_dp, &sink_rates); in intel_dp_print_rates()
1331 common_len = intel_dp_common_rates(intel_dp, common_rates); in intel_dp_print_rates()
1348 intel_dp_max_link_rate(struct intel_dp *intel_dp) in intel_dp_max_link_rate() argument
1353 len = intel_dp_common_rates(intel_dp, rates); in intel_dp_max_link_rate()
1360 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate) in intel_dp_rate_select() argument
1362 return rate_to_index(rate, intel_dp->sink_rates); in intel_dp_rate_select()
1365 static void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, in intel_dp_compute_rate() argument
1368 if (intel_dp->num_sink_rates) { in intel_dp_compute_rate()
1371 intel_dp_rate_select(intel_dp, port_clock); in intel_dp_compute_rate()
1385 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_compute_config() local
1386 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_compute_config()
1388 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_compute_config()
1391 int max_lane_count = intel_dp_max_lane_count(intel_dp); in intel_dp_compute_config()
1401 common_len = intel_dp_common_rates(intel_dp, common_rates); in intel_dp_compute_config()
1413 pipe_config->has_audio = intel_dp->has_audio && port != PORT_A; in intel_dp_compute_config()
1415 if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) { in intel_dp_compute_config()
1445 if (is_edp(intel_dp)) { in intel_dp_compute_config()
1489 if (intel_dp->color_range_auto) { in intel_dp_compute_config()
1499 intel_dp->limited_color_range; in intel_dp_compute_config()
1507 intel_dp_compute_rate(intel_dp, pipe_config->port_clock, in intel_dp_compute_config()
1530 if (IS_SKYLAKE(dev) && is_edp(intel_dp)) in intel_dp_compute_config()
1542 static void ironlake_set_pll_cpu_edp(struct intel_dp *intel_dp) in ironlake_set_pll_cpu_edp() argument
1544 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in ironlake_set_pll_cpu_edp()
1561 intel_dp->DP |= DP_PLL_FREQ_160MHZ; in ironlake_set_pll_cpu_edp()
1564 intel_dp->DP |= DP_PLL_FREQ_270MHZ; in ironlake_set_pll_cpu_edp()
1573 void intel_dp_set_link_params(struct intel_dp *intel_dp, in intel_dp_set_link_params() argument
1576 intel_dp->link_rate = pipe_config->port_clock; in intel_dp_set_link_params()
1577 intel_dp->lane_count = pipe_config->lane_count; in intel_dp_set_link_params()
1584 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_prepare() local
1585 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_prepare()
1589 intel_dp_set_link_params(intel_dp, crtc->config); in intel_dp_prepare()
1611 intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare()
1614 intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in intel_dp_prepare()
1615 intel_dp->DP |= DP_PORT_WIDTH(crtc->config->lane_count); in intel_dp_prepare()
1618 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in intel_dp_prepare()
1624 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
1626 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
1627 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
1629 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
1630 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
1632 intel_dp->DP |= crtc->pipe << 29; in intel_dp_prepare()
1636 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
1639 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
1647 intel_dp->DP |= DP_COLOR_RANGE_16_235; in intel_dp_prepare()
1650 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
1652 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
1653 intel_dp->DP |= DP_LINK_TRAIN_OFF; in intel_dp_prepare()
1655 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_prepare()
1656 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
1659 intel_dp->DP |= DP_PIPE_SELECT_CHV(crtc->pipe); in intel_dp_prepare()
1661 intel_dp->DP |= DP_PIPEB_SELECT; in intel_dp_prepare()
1674 static void wait_panel_status(struct intel_dp *intel_dp, in wait_panel_status() argument
1678 struct drm_device *dev = intel_dp_to_dev(intel_dp); in wait_panel_status()
1684 pp_stat_reg = _pp_stat_reg(intel_dp); in wait_panel_status()
1685 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in wait_panel_status()
1701 static void wait_panel_on(struct intel_dp *intel_dp) in wait_panel_on() argument
1704 wait_panel_status(intel_dp, IDLE_ON_MASK, IDLE_ON_VALUE); in wait_panel_on()
1707 static void wait_panel_off(struct intel_dp *intel_dp) in wait_panel_off() argument
1710 wait_panel_status(intel_dp, IDLE_OFF_MASK, IDLE_OFF_VALUE); in wait_panel_off()
1713 static void wait_panel_power_cycle(struct intel_dp *intel_dp) in wait_panel_power_cycle() argument
1719 wait_remaining_ms_from_jiffies(intel_dp->last_power_cycle, in wait_panel_power_cycle()
1720 intel_dp->panel_power_cycle_delay); in wait_panel_power_cycle()
1722 wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE); in wait_panel_power_cycle()
1725 static void wait_backlight_on(struct intel_dp *intel_dp) in wait_backlight_on() argument
1727 wait_remaining_ms_from_jiffies(intel_dp->last_power_on, in wait_backlight_on()
1728 intel_dp->backlight_on_delay); in wait_backlight_on()
1731 static void edp_wait_backlight_off(struct intel_dp *intel_dp) in edp_wait_backlight_off() argument
1733 wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off, in edp_wait_backlight_off()
1734 intel_dp->backlight_off_delay); in edp_wait_backlight_off()
1741 static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) in ironlake_get_pp_control() argument
1743 struct drm_device *dev = intel_dp_to_dev(intel_dp); in ironlake_get_pp_control()
1749 control = I915_READ(_pp_ctrl_reg(intel_dp)); in ironlake_get_pp_control()
1762 static bool edp_panel_vdd_on(struct intel_dp *intel_dp) in edp_panel_vdd_on() argument
1764 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_vdd_on()
1765 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in edp_panel_vdd_on()
1771 bool need_to_disable = !intel_dp->want_panel_vdd; in edp_panel_vdd_on()
1775 if (!is_edp(intel_dp)) in edp_panel_vdd_on()
1778 cancel_delayed_work(&intel_dp->panel_vdd_work); in edp_panel_vdd_on()
1779 intel_dp->want_panel_vdd = true; in edp_panel_vdd_on()
1781 if (edp_have_panel_vdd(intel_dp)) in edp_panel_vdd_on()
1790 if (!edp_have_panel_power(intel_dp)) in edp_panel_vdd_on()
1791 wait_panel_power_cycle(intel_dp); in edp_panel_vdd_on()
1793 pp = ironlake_get_pp_control(intel_dp); in edp_panel_vdd_on()
1796 pp_stat_reg = _pp_stat_reg(intel_dp); in edp_panel_vdd_on()
1797 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_vdd_on()
1806 if (!edp_have_panel_power(intel_dp)) { in edp_panel_vdd_on()
1809 msleep(intel_dp->panel_power_up_delay); in edp_panel_vdd_on()
1822 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp) in intel_edp_panel_vdd_on() argument
1826 if (!is_edp(intel_dp)) in intel_edp_panel_vdd_on()
1829 pps_lock(intel_dp); in intel_edp_panel_vdd_on()
1830 vdd = edp_panel_vdd_on(intel_dp); in intel_edp_panel_vdd_on()
1831 pps_unlock(intel_dp); in intel_edp_panel_vdd_on()
1834 port_name(dp_to_dig_port(intel_dp)->port)); in intel_edp_panel_vdd_on()
1837 static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) in edp_panel_vdd_off_sync() argument
1839 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_vdd_off_sync()
1842 dp_to_dig_port(intel_dp); in edp_panel_vdd_off_sync()
1850 WARN_ON(intel_dp->want_panel_vdd); in edp_panel_vdd_off_sync()
1852 if (!edp_have_panel_vdd(intel_dp)) in edp_panel_vdd_off_sync()
1858 pp = ironlake_get_pp_control(intel_dp); in edp_panel_vdd_off_sync()
1861 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_vdd_off_sync()
1862 pp_stat_reg = _pp_stat_reg(intel_dp); in edp_panel_vdd_off_sync()
1872 intel_dp->last_power_cycle = jiffies; in edp_panel_vdd_off_sync()
1880 struct intel_dp *intel_dp = container_of(to_delayed_work(__work), in edp_panel_vdd_work() local
1881 struct intel_dp, panel_vdd_work); in edp_panel_vdd_work()
1883 pps_lock(intel_dp); in edp_panel_vdd_work()
1884 if (!intel_dp->want_panel_vdd) in edp_panel_vdd_work()
1885 edp_panel_vdd_off_sync(intel_dp); in edp_panel_vdd_work()
1886 pps_unlock(intel_dp); in edp_panel_vdd_work()
1889 static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) in edp_panel_vdd_schedule_off() argument
1898 delay = msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5); in edp_panel_vdd_schedule_off()
1899 schedule_delayed_work(&intel_dp->panel_vdd_work, delay); in edp_panel_vdd_schedule_off()
1907 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) in edp_panel_vdd_off() argument
1910 intel_dp_to_dev(intel_dp)->dev_private; in edp_panel_vdd_off()
1914 if (!is_edp(intel_dp)) in edp_panel_vdd_off()
1917 I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on", in edp_panel_vdd_off()
1918 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_vdd_off()
1920 intel_dp->want_panel_vdd = false; in edp_panel_vdd_off()
1923 edp_panel_vdd_off_sync(intel_dp); in edp_panel_vdd_off()
1925 edp_panel_vdd_schedule_off(intel_dp); in edp_panel_vdd_off()
1928 static void edp_panel_on(struct intel_dp *intel_dp) in edp_panel_on() argument
1930 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_on()
1937 if (!is_edp(intel_dp)) in edp_panel_on()
1941 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_on()
1943 if (WARN(edp_have_panel_power(intel_dp), in edp_panel_on()
1945 port_name(dp_to_dig_port(intel_dp)->port))) in edp_panel_on()
1948 wait_panel_power_cycle(intel_dp); in edp_panel_on()
1950 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_on()
1951 pp = ironlake_get_pp_control(intel_dp); in edp_panel_on()
1966 wait_panel_on(intel_dp); in edp_panel_on()
1967 intel_dp->last_power_on = jiffies; in edp_panel_on()
1976 void intel_edp_panel_on(struct intel_dp *intel_dp) in intel_edp_panel_on() argument
1978 if (!is_edp(intel_dp)) in intel_edp_panel_on()
1981 pps_lock(intel_dp); in intel_edp_panel_on()
1982 edp_panel_on(intel_dp); in intel_edp_panel_on()
1983 pps_unlock(intel_dp); in intel_edp_panel_on()
1987 static void edp_panel_off(struct intel_dp *intel_dp) in edp_panel_off() argument
1989 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in edp_panel_off()
1991 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_panel_off()
1999 if (!is_edp(intel_dp)) in edp_panel_off()
2003 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_off()
2005 WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n", in edp_panel_off()
2006 port_name(dp_to_dig_port(intel_dp)->port)); in edp_panel_off()
2008 pp = ironlake_get_pp_control(intel_dp); in edp_panel_off()
2014 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in edp_panel_off()
2016 intel_dp->want_panel_vdd = false; in edp_panel_off()
2021 intel_dp->last_power_cycle = jiffies; in edp_panel_off()
2022 wait_panel_off(intel_dp); in edp_panel_off()
2029 void intel_edp_panel_off(struct intel_dp *intel_dp) in intel_edp_panel_off() argument
2031 if (!is_edp(intel_dp)) in intel_edp_panel_off()
2034 pps_lock(intel_dp); in intel_edp_panel_off()
2035 edp_panel_off(intel_dp); in intel_edp_panel_off()
2036 pps_unlock(intel_dp); in intel_edp_panel_off()
2040 static void _intel_edp_backlight_on(struct intel_dp *intel_dp) in _intel_edp_backlight_on() argument
2042 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in _intel_edp_backlight_on()
2054 wait_backlight_on(intel_dp); in _intel_edp_backlight_on()
2056 pps_lock(intel_dp); in _intel_edp_backlight_on()
2058 pp = ironlake_get_pp_control(intel_dp); in _intel_edp_backlight_on()
2061 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in _intel_edp_backlight_on()
2066 pps_unlock(intel_dp); in _intel_edp_backlight_on()
2070 void intel_edp_backlight_on(struct intel_dp *intel_dp) in intel_edp_backlight_on() argument
2072 if (!is_edp(intel_dp)) in intel_edp_backlight_on()
2077 intel_panel_enable_backlight(intel_dp->attached_connector); in intel_edp_backlight_on()
2078 _intel_edp_backlight_on(intel_dp); in intel_edp_backlight_on()
2082 static void _intel_edp_backlight_off(struct intel_dp *intel_dp) in _intel_edp_backlight_off() argument
2084 struct drm_device *dev = intel_dp_to_dev(intel_dp); in _intel_edp_backlight_off()
2089 if (!is_edp(intel_dp)) in _intel_edp_backlight_off()
2092 pps_lock(intel_dp); in _intel_edp_backlight_off()
2094 pp = ironlake_get_pp_control(intel_dp); in _intel_edp_backlight_off()
2097 pp_ctrl_reg = _pp_ctrl_reg(intel_dp); in _intel_edp_backlight_off()
2102 pps_unlock(intel_dp); in _intel_edp_backlight_off()
2104 intel_dp->last_backlight_off = jiffies; in _intel_edp_backlight_off()
2105 edp_wait_backlight_off(intel_dp); in _intel_edp_backlight_off()
2109 void intel_edp_backlight_off(struct intel_dp *intel_dp) in intel_edp_backlight_off() argument
2111 if (!is_edp(intel_dp)) in intel_edp_backlight_off()
2116 _intel_edp_backlight_off(intel_dp); in intel_edp_backlight_off()
2117 intel_panel_disable_backlight(intel_dp->attached_connector); in intel_edp_backlight_off()
2127 struct intel_dp *intel_dp = intel_attached_dp(&connector->base); in intel_edp_backlight_power() local
2130 pps_lock(intel_dp); in intel_edp_backlight_power()
2131 is_enabled = ironlake_get_pp_control(intel_dp) & EDP_BLC_ENABLE; in intel_edp_backlight_power()
2132 pps_unlock(intel_dp); in intel_edp_backlight_power()
2141 _intel_edp_backlight_on(intel_dp); in intel_edp_backlight_power()
2143 _intel_edp_backlight_off(intel_dp); in intel_edp_backlight_power()
2146 static void ironlake_edp_pll_on(struct intel_dp *intel_dp) in ironlake_edp_pll_on() argument
2148 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ironlake_edp_pll_on()
2165 intel_dp->DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE); in ironlake_edp_pll_on()
2166 intel_dp->DP |= DP_PLL_ENABLE; in ironlake_edp_pll_on()
2167 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2172 static void ironlake_edp_pll_off(struct intel_dp *intel_dp) in ironlake_edp_pll_off() argument
2174 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ironlake_edp_pll_off()
2198 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode) in intel_dp_sink_dpms() argument
2203 if (intel_dp->dpcd[DP_DPCD_REV] < 0x11) in intel_dp_sink_dpms()
2207 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, in intel_dp_sink_dpms()
2215 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, in intel_dp_sink_dpms()
2231 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_get_hw_state() local
2232 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_get_hw_state()
2242 tmp = I915_READ(intel_dp->output_reg); in intel_dp_get_hw_state()
2261 intel_dp->output_reg); in intel_dp_get_hw_state()
2274 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_dp_get_config() local
2278 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_get_config()
2282 tmp = I915_READ(intel_dp->output_reg); in intel_dp_get_config()
2338 if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp && in intel_dp_get_config()
2361 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_disable_dp() local
2369 intel_psr_disable(intel_dp); in intel_disable_dp()
2373 intel_edp_panel_vdd_on(intel_dp); in intel_disable_dp()
2374 intel_edp_backlight_off(intel_dp); in intel_disable_dp()
2375 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); in intel_disable_dp()
2376 intel_edp_panel_off(intel_dp); in intel_disable_dp()
2380 intel_dp_link_down(intel_dp); in intel_disable_dp()
2385 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in ilk_post_disable_dp() local
2386 enum port port = dp_to_dig_port(intel_dp)->port; in ilk_post_disable_dp()
2388 intel_dp_link_down(intel_dp); in ilk_post_disable_dp()
2390 ironlake_edp_pll_off(intel_dp); in ilk_post_disable_dp()
2395 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_post_disable_dp() local
2397 intel_dp_link_down(intel_dp); in vlv_post_disable_dp()
2446 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in chv_post_disable_dp() local
2450 intel_dp_link_down(intel_dp); in chv_post_disable_dp()
2461 _intel_dp_set_link_train(struct intel_dp *intel_dp, in _intel_dp_set_link_train() argument
2465 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in _intel_dp_set_link_train()
2544 static void intel_dp_enable_port(struct intel_dp *intel_dp) in intel_dp_enable_port() argument
2546 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_enable_port()
2550 _intel_dp_set_link_train(intel_dp, &intel_dp->DP, in intel_dp_enable_port()
2553 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port()
2554 POSTING_READ(intel_dp->output_reg); in intel_dp_enable_port()
2562 intel_dp->DP |= DP_PORT_EN; in intel_dp_enable_port()
2564 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port()
2565 POSTING_READ(intel_dp->output_reg); in intel_dp_enable_port()
2570 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in intel_enable_dp() local
2574 uint32_t dp_reg = I915_READ(intel_dp->output_reg); in intel_enable_dp()
2579 pps_lock(intel_dp); in intel_enable_dp()
2582 vlv_init_panel_power_sequencer(intel_dp); in intel_enable_dp()
2584 intel_dp_enable_port(intel_dp); in intel_enable_dp()
2586 edp_panel_vdd_on(intel_dp); in intel_enable_dp()
2587 edp_panel_on(intel_dp); in intel_enable_dp()
2588 edp_panel_vdd_off(intel_dp, true); in intel_enable_dp()
2590 pps_unlock(intel_dp); in intel_enable_dp()
2598 vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp), in intel_enable_dp()
2602 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); in intel_enable_dp()
2603 intel_dp_start_link_train(intel_dp); in intel_enable_dp()
2604 intel_dp_stop_link_train(intel_dp); in intel_enable_dp()
2615 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in g4x_enable_dp() local
2618 intel_edp_backlight_on(intel_dp); in g4x_enable_dp()
2623 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_enable_dp() local
2625 intel_edp_backlight_on(intel_dp); in vlv_enable_dp()
2626 intel_psr_enable(intel_dp); in vlv_enable_dp()
2631 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in g4x_pre_enable_dp() local
2632 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in g4x_pre_enable_dp()
2638 ironlake_set_pll_cpu_edp(intel_dp); in g4x_pre_enable_dp()
2639 ironlake_edp_pll_on(intel_dp); in g4x_pre_enable_dp()
2643 static void vlv_detach_power_sequencer(struct intel_dp *intel_dp) in vlv_detach_power_sequencer() argument
2645 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_detach_power_sequencer()
2647 enum pipe pipe = intel_dp->pps_pipe; in vlv_detach_power_sequencer()
2650 edp_panel_vdd_off_sync(intel_dp); in vlv_detach_power_sequencer()
2666 intel_dp->pps_pipe = INVALID_PIPE; in vlv_detach_power_sequencer()
2682 struct intel_dp *intel_dp; in vlv_steal_power_sequencer() local
2688 intel_dp = enc_to_intel_dp(&encoder->base); in vlv_steal_power_sequencer()
2689 port = dp_to_dig_port(intel_dp)->port; in vlv_steal_power_sequencer()
2691 if (intel_dp->pps_pipe != pipe) in vlv_steal_power_sequencer()
2702 vlv_detach_power_sequencer(intel_dp); in vlv_steal_power_sequencer()
2706 static void vlv_init_panel_power_sequencer(struct intel_dp *intel_dp) in vlv_init_panel_power_sequencer() argument
2708 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in vlv_init_panel_power_sequencer()
2716 if (!is_edp(intel_dp)) in vlv_init_panel_power_sequencer()
2719 if (intel_dp->pps_pipe == crtc->pipe) in vlv_init_panel_power_sequencer()
2727 if (intel_dp->pps_pipe != INVALID_PIPE) in vlv_init_panel_power_sequencer()
2728 vlv_detach_power_sequencer(intel_dp); in vlv_init_panel_power_sequencer()
2737 intel_dp->pps_pipe = crtc->pipe; in vlv_init_panel_power_sequencer()
2740 pipe_name(intel_dp->pps_pipe), port_name(intel_dig_port->port)); in vlv_init_panel_power_sequencer()
2743 intel_dp_init_panel_power_sequencer(dev, intel_dp); in vlv_init_panel_power_sequencer()
2744 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in vlv_init_panel_power_sequencer()
2749 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in vlv_pre_enable_dp() local
2750 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in vlv_pre_enable_dp()
2808 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base); in chv_pre_enable_dp() local
2809 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in chv_pre_enable_dp()
3047 intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t link_status[DP_LINK_STATUS_SIZE]) in intel_dp_get_link_status() argument
3049 return intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_link_status()
3057 intel_dp_voltage_max(struct intel_dp *intel_dp) in intel_dp_voltage_max() argument
3059 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_voltage_max()
3061 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_voltage_max()
3080 intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t voltage_swing) in intel_dp_pre_emphasis_max() argument
3082 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_pre_emphasis_max()
3083 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_pre_emphasis_max()
3147 static uint32_t vlv_signal_levels(struct intel_dp *intel_dp) in vlv_signal_levels() argument
3149 struct drm_device *dev = intel_dp_to_dev(intel_dp); in vlv_signal_levels()
3151 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in vlv_signal_levels()
3156 uint8_t train_set = intel_dp->train_set[0]; in vlv_signal_levels()
3253 static uint32_t chv_signal_levels(struct intel_dp *intel_dp) in chv_signal_levels() argument
3255 struct drm_device *dev = intel_dp_to_dev(intel_dp); in chv_signal_levels()
3257 struct intel_digital_port *dport = dp_to_dig_port(intel_dp); in chv_signal_levels()
3260 uint8_t train_set = intel_dp->train_set[0]; in chv_signal_levels()
3422 intel_get_adjust_train(struct intel_dp *intel_dp, in intel_get_adjust_train() argument
3431 for (lane = 0; lane < intel_dp->lane_count; lane++) { in intel_get_adjust_train()
3441 voltage_max = intel_dp_voltage_max(intel_dp); in intel_get_adjust_train()
3445 preemph_max = intel_dp_pre_emphasis_max(intel_dp, v); in intel_get_adjust_train()
3450 intel_dp->train_set[lane] = v | p; in intel_get_adjust_train()
3552 intel_dp_set_signal_levels(struct intel_dp *intel_dp, uint32_t *DP) in intel_dp_set_signal_levels() argument
3554 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_signal_levels()
3558 uint8_t train_set = intel_dp->train_set[0]; in intel_dp_set_signal_levels()
3561 signal_levels = ddi_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3568 signal_levels = chv_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3570 signal_levels = vlv_signal_levels(intel_dp); in intel_dp_set_signal_levels()
3595 intel_dp_set_link_train(struct intel_dp *intel_dp, in intel_dp_set_link_train() argument
3599 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_link_train()
3602 uint8_t buf[sizeof(intel_dp->train_set) + 1]; in intel_dp_set_link_train()
3605 _intel_dp_set_link_train(intel_dp, DP, dp_train_pat); in intel_dp_set_link_train()
3607 I915_WRITE(intel_dp->output_reg, *DP); in intel_dp_set_link_train()
3608 POSTING_READ(intel_dp->output_reg); in intel_dp_set_link_train()
3617 memcpy(buf + 1, intel_dp->train_set, intel_dp->lane_count); in intel_dp_set_link_train()
3618 len = intel_dp->lane_count + 1; in intel_dp_set_link_train()
3621 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_PATTERN_SET, in intel_dp_set_link_train()
3628 intel_dp_reset_link_train(struct intel_dp *intel_dp, uint32_t *DP, in intel_dp_reset_link_train() argument
3631 if (!intel_dp->train_set_valid) in intel_dp_reset_link_train()
3632 memset(intel_dp->train_set, 0, sizeof(intel_dp->train_set)); in intel_dp_reset_link_train()
3633 intel_dp_set_signal_levels(intel_dp, DP); in intel_dp_reset_link_train()
3634 return intel_dp_set_link_train(intel_dp, DP, dp_train_pat); in intel_dp_reset_link_train()
3638 intel_dp_update_link_train(struct intel_dp *intel_dp, uint32_t *DP, in intel_dp_update_link_train() argument
3641 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_update_link_train()
3646 intel_get_adjust_train(intel_dp, link_status); in intel_dp_update_link_train()
3647 intel_dp_set_signal_levels(intel_dp, DP); in intel_dp_update_link_train()
3649 I915_WRITE(intel_dp->output_reg, *DP); in intel_dp_update_link_train()
3650 POSTING_READ(intel_dp->output_reg); in intel_dp_update_link_train()
3652 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_update_link_train()
3653 intel_dp->train_set, intel_dp->lane_count); in intel_dp_update_link_train()
3655 return ret == intel_dp->lane_count; in intel_dp_update_link_train()
3658 static void intel_dp_set_idle_link_train(struct intel_dp *intel_dp) in intel_dp_set_idle_link_train() argument
3660 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_idle_link_train()
3691 intel_dp_link_training_clock_recovery(struct intel_dp *intel_dp) in intel_dp_link_training_clock_recovery() argument
3693 struct drm_encoder *encoder = &dp_to_dig_port(intel_dp)->base.base; in intel_dp_link_training_clock_recovery()
3698 uint32_t DP = intel_dp->DP; in intel_dp_link_training_clock_recovery()
3705 intel_dp_compute_rate(intel_dp, intel_dp->link_rate, in intel_dp_link_training_clock_recovery()
3710 link_config[1] = intel_dp->lane_count; in intel_dp_link_training_clock_recovery()
3711 if (drm_dp_enhanced_frame_cap(intel_dp->dpcd)) in intel_dp_link_training_clock_recovery()
3713 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, 2); in intel_dp_link_training_clock_recovery()
3714 if (intel_dp->num_sink_rates) in intel_dp_link_training_clock_recovery()
3715 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_RATE_SET, in intel_dp_link_training_clock_recovery()
3720 drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2); in intel_dp_link_training_clock_recovery()
3725 if (!intel_dp_reset_link_train(intel_dp, &DP, in intel_dp_link_training_clock_recovery()
3738 drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd); in intel_dp_link_training_clock_recovery()
3739 if (!intel_dp_get_link_status(intel_dp, link_status)) { in intel_dp_link_training_clock_recovery()
3744 if (drm_dp_clock_recovery_ok(link_status, intel_dp->lane_count)) { in intel_dp_link_training_clock_recovery()
3753 if (intel_dp->train_set_valid) { in intel_dp_link_training_clock_recovery()
3756 intel_dp->train_set_valid = false; in intel_dp_link_training_clock_recovery()
3757 if (!intel_dp_reset_link_train(intel_dp, &DP, in intel_dp_link_training_clock_recovery()
3767 for (i = 0; i < intel_dp->lane_count; i++) in intel_dp_link_training_clock_recovery()
3768 if ((intel_dp->train_set[i] & DP_TRAIN_MAX_SWING_REACHED) == 0) in intel_dp_link_training_clock_recovery()
3770 if (i == intel_dp->lane_count) { in intel_dp_link_training_clock_recovery()
3776 intel_dp_reset_link_train(intel_dp, &DP, in intel_dp_link_training_clock_recovery()
3784 if ((intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK) == voltage) { in intel_dp_link_training_clock_recovery()
3792 voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; in intel_dp_link_training_clock_recovery()
3795 if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) { in intel_dp_link_training_clock_recovery()
3801 intel_dp->DP = DP; in intel_dp_link_training_clock_recovery()
3805 intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp) in intel_dp_link_training_channel_equalization() argument
3807 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_link_training_channel_equalization()
3811 uint32_t DP = intel_dp->DP; in intel_dp_link_training_channel_equalization()
3824 drm_dp_tps3_supported(intel_dp->dpcd)) in intel_dp_link_training_channel_equalization()
3826 else if (intel_dp->link_rate == 540000) in intel_dp_link_training_channel_equalization()
3830 if (!intel_dp_set_link_train(intel_dp, &DP, in intel_dp_link_training_channel_equalization()
3848 drm_dp_link_train_channel_eq_delay(intel_dp->dpcd); in intel_dp_link_training_channel_equalization()
3849 if (!intel_dp_get_link_status(intel_dp, link_status)) { in intel_dp_link_training_channel_equalization()
3856 intel_dp->lane_count)) { in intel_dp_link_training_channel_equalization()
3857 intel_dp->train_set_valid = false; in intel_dp_link_training_channel_equalization()
3858 intel_dp_link_training_clock_recovery(intel_dp); in intel_dp_link_training_channel_equalization()
3859 intel_dp_set_link_train(intel_dp, &DP, in intel_dp_link_training_channel_equalization()
3867 intel_dp->lane_count)) { in intel_dp_link_training_channel_equalization()
3874 intel_dp->train_set_valid = false; in intel_dp_link_training_channel_equalization()
3875 intel_dp_link_training_clock_recovery(intel_dp); in intel_dp_link_training_channel_equalization()
3876 intel_dp_set_link_train(intel_dp, &DP, in intel_dp_link_training_channel_equalization()
3885 if (!intel_dp_update_link_train(intel_dp, &DP, link_status)) { in intel_dp_link_training_channel_equalization()
3892 intel_dp_set_idle_link_train(intel_dp); in intel_dp_link_training_channel_equalization()
3894 intel_dp->DP = DP; in intel_dp_link_training_channel_equalization()
3897 intel_dp->train_set_valid = true; in intel_dp_link_training_channel_equalization()
3902 void intel_dp_stop_link_train(struct intel_dp *intel_dp) in intel_dp_stop_link_train() argument
3904 intel_dp_set_link_train(intel_dp, &intel_dp->DP, in intel_dp_stop_link_train()
3909 intel_dp_start_link_train(struct intel_dp *intel_dp) in intel_dp_start_link_train() argument
3911 intel_dp_link_training_clock_recovery(intel_dp); in intel_dp_start_link_train()
3912 intel_dp_link_training_channel_equalization(intel_dp); in intel_dp_start_link_train()
3916 intel_dp_link_down(struct intel_dp *intel_dp) in intel_dp_link_down() argument
3918 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_link_down()
3923 uint32_t DP = intel_dp->DP; in intel_dp_link_down()
3928 if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0)) in intel_dp_link_down()
3944 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3945 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3948 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3949 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3960 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3961 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3964 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
3965 POSTING_READ(intel_dp->output_reg); in intel_dp_link_down()
3968 msleep(intel_dp->panel_power_down_delay); in intel_dp_link_down()
3972 intel_dp_get_dpcd(struct intel_dp *intel_dp) in intel_dp_get_dpcd() argument
3974 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_get_dpcd()
3979 if (intel_dp_dpcd_read_wake(&intel_dp->aux, 0x000, intel_dp->dpcd, in intel_dp_get_dpcd()
3980 sizeof(intel_dp->dpcd)) < 0) in intel_dp_get_dpcd()
3983 DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd); in intel_dp_get_dpcd()
3985 if (intel_dp->dpcd[DP_DPCD_REV] == 0) in intel_dp_get_dpcd()
3989 memset(intel_dp->psr_dpcd, 0, sizeof(intel_dp->psr_dpcd)); in intel_dp_get_dpcd()
3990 if (is_edp(intel_dp)) { in intel_dp_get_dpcd()
3991 intel_dp_dpcd_read_wake(&intel_dp->aux, DP_PSR_SUPPORT, in intel_dp_get_dpcd()
3992 intel_dp->psr_dpcd, in intel_dp_get_dpcd()
3993 sizeof(intel_dp->psr_dpcd)); in intel_dp_get_dpcd()
3994 if (intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED) { in intel_dp_get_dpcd()
4000 (intel_dp->psr_dpcd[0] & DP_PSR2_IS_SUPPORTED)) { in intel_dp_get_dpcd()
4004 intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_dpcd()
4017 yesno(drm_dp_tps3_supported(intel_dp->dpcd))); in intel_dp_get_dpcd()
4020 if (is_edp(intel_dp) && in intel_dp_get_dpcd()
4021 (intel_dp->dpcd[DP_EDP_CONFIGURATION_CAP] & DP_DPCD_DISPLAY_CONTROL_CAPABLE) && in intel_dp_get_dpcd()
4022 (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_EDP_DPCD_REV, &rev, 1) == 1) && in intel_dp_get_dpcd()
4027 intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_dpcd()
4039 intel_dp->sink_rates[i] = (val * 200) / 10; in intel_dp_get_dpcd()
4041 intel_dp->num_sink_rates = i; in intel_dp_get_dpcd()
4044 intel_dp_print_rates(intel_dp); in intel_dp_get_dpcd()
4046 if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & in intel_dp_get_dpcd()
4050 if (intel_dp->dpcd[DP_DPCD_REV] == 0x10) in intel_dp_get_dpcd()
4053 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_DOWNSTREAM_PORT_0, in intel_dp_get_dpcd()
4054 intel_dp->downstream_ports, in intel_dp_get_dpcd()
4062 intel_dp_probe_oui(struct intel_dp *intel_dp) in intel_dp_probe_oui() argument
4066 if (!(intel_dp->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) in intel_dp_probe_oui()
4069 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_SINK_OUI, buf, 3) == 3) in intel_dp_probe_oui()
4073 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_BRANCH_OUI, buf, 3) == 3) in intel_dp_probe_oui()
4079 intel_dp_probe_mst(struct intel_dp *intel_dp) in intel_dp_probe_mst() argument
4083 if (!intel_dp->can_mst) in intel_dp_probe_mst()
4086 if (intel_dp->dpcd[DP_DPCD_REV] < 0x12) in intel_dp_probe_mst()
4089 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_MSTM_CAP, buf, 1)) { in intel_dp_probe_mst()
4092 intel_dp->is_mst = true; in intel_dp_probe_mst()
4095 intel_dp->is_mst = false; in intel_dp_probe_mst()
4099 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); in intel_dp_probe_mst()
4100 return intel_dp->is_mst; in intel_dp_probe_mst()
4103 static int intel_dp_sink_crc_stop(struct intel_dp *intel_dp) in intel_dp_sink_crc_stop() argument
4105 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_sink_crc_stop()
4110 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) { in intel_dp_sink_crc_stop()
4116 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, in intel_dp_sink_crc_stop()
4123 intel_dp->sink_crc.started = false; in intel_dp_sink_crc_stop()
4129 static int intel_dp_sink_crc_start(struct intel_dp *intel_dp) in intel_dp_sink_crc_start() argument
4131 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_sink_crc_start()
4136 if (intel_dp->sink_crc.started) { in intel_dp_sink_crc_start()
4137 ret = intel_dp_sink_crc_stop(intel_dp); in intel_dp_sink_crc_start()
4142 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK_MISC, &buf) < 0) in intel_dp_sink_crc_start()
4148 intel_dp->sink_crc.last_count = buf & DP_TEST_COUNT_MASK; in intel_dp_sink_crc_start()
4150 if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK, &buf) < 0) in intel_dp_sink_crc_start()
4155 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_SINK, in intel_dp_sink_crc_start()
4161 intel_dp->sink_crc.started = true; in intel_dp_sink_crc_start()
4165 int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc) in intel_dp_sink_crc() argument
4167 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_dp_sink_crc()
4175 ret = intel_dp_sink_crc_start(intel_dp); in intel_dp_sink_crc()
4182 if (drm_dp_dpcd_readb(&intel_dp->aux, in intel_dp_sink_crc()
4194 intel_dp->sink_crc.last_count = 0; in intel_dp_sink_crc()
4196 if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) < 0) { in intel_dp_sink_crc()
4201 old_equal_new = (count == intel_dp->sink_crc.last_count && in intel_dp_sink_crc()
4202 !memcmp(intel_dp->sink_crc.last_crc, crc, in intel_dp_sink_crc()
4207 intel_dp->sink_crc.last_count = buf & DP_TEST_COUNT_MASK; in intel_dp_sink_crc()
4208 memcpy(intel_dp->sink_crc.last_crc, crc, 6 * sizeof(u8)); in intel_dp_sink_crc()
4221 intel_dp_sink_crc_stop(intel_dp); in intel_dp_sink_crc()
4226 intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector) in intel_dp_get_sink_irq() argument
4228 return intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_sink_irq()
4234 intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *sink_irq_vector) in intel_dp_get_sink_irq_esi() argument
4238 ret = intel_dp_dpcd_read_wake(&intel_dp->aux, in intel_dp_get_sink_irq_esi()
4247 static uint8_t intel_dp_autotest_link_training(struct intel_dp *intel_dp) in intel_dp_autotest_link_training() argument
4253 static uint8_t intel_dp_autotest_video_pattern(struct intel_dp *intel_dp) in intel_dp_autotest_video_pattern() argument
4259 static uint8_t intel_dp_autotest_edid(struct intel_dp *intel_dp) in intel_dp_autotest_edid() argument
4262 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_autotest_edid()
4267 intel_dp->aux.i2c_defer_count > 6) { in intel_dp_autotest_edid()
4275 if (intel_dp->aux.i2c_nack_count > 0 || in intel_dp_autotest_edid()
4276 intel_dp->aux.i2c_defer_count > 0) in intel_dp_autotest_edid()
4278 intel_dp->aux.i2c_nack_count, in intel_dp_autotest_edid()
4279 intel_dp->aux.i2c_defer_count); in intel_dp_autotest_edid()
4280 intel_dp->compliance_test_data = INTEL_DP_RESOLUTION_FAILSAFE; in intel_dp_autotest_edid()
4289 if (!drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_autotest_edid()
4296 intel_dp->compliance_test_data = INTEL_DP_RESOLUTION_STANDARD; in intel_dp_autotest_edid()
4300 intel_dp->compliance_test_active = 1; in intel_dp_autotest_edid()
4305 static uint8_t intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp) in intel_dp_autotest_phy_pattern() argument
4311 static void intel_dp_handle_test_request(struct intel_dp *intel_dp) in intel_dp_handle_test_request() argument
4317 intel_dp->compliance_test_active = 0; in intel_dp_handle_test_request()
4318 intel_dp->compliance_test_type = 0; in intel_dp_handle_test_request()
4319 intel_dp->compliance_test_data = 0; in intel_dp_handle_test_request()
4321 intel_dp->aux.i2c_nack_count = 0; in intel_dp_handle_test_request()
4322 intel_dp->aux.i2c_defer_count = 0; in intel_dp_handle_test_request()
4324 status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_REQUEST, &rxdata, 1); in intel_dp_handle_test_request()
4333 intel_dp->compliance_test_type = DP_TEST_LINK_TRAINING; in intel_dp_handle_test_request()
4334 response = intel_dp_autotest_link_training(intel_dp); in intel_dp_handle_test_request()
4338 intel_dp->compliance_test_type = DP_TEST_LINK_VIDEO_PATTERN; in intel_dp_handle_test_request()
4339 response = intel_dp_autotest_video_pattern(intel_dp); in intel_dp_handle_test_request()
4343 intel_dp->compliance_test_type = DP_TEST_LINK_EDID_READ; in intel_dp_handle_test_request()
4344 response = intel_dp_autotest_edid(intel_dp); in intel_dp_handle_test_request()
4348 intel_dp->compliance_test_type = DP_TEST_LINK_PHY_TEST_PATTERN; in intel_dp_handle_test_request()
4349 response = intel_dp_autotest_phy_pattern(intel_dp); in intel_dp_handle_test_request()
4357 status = drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_handle_test_request()
4365 intel_dp_check_mst_status(struct intel_dp *intel_dp) in intel_dp_check_mst_status() argument
4369 if (intel_dp->is_mst) { in intel_dp_check_mst_status()
4374 bret = intel_dp_get_sink_irq_esi(intel_dp, esi); in intel_dp_check_mst_status()
4379 if (intel_dp->active_mst_links && in intel_dp_check_mst_status()
4380 !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) { in intel_dp_check_mst_status()
4382 intel_dp_start_link_train(intel_dp); in intel_dp_check_mst_status()
4383 intel_dp_stop_link_train(intel_dp); in intel_dp_check_mst_status()
4387 ret = drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, &handled); in intel_dp_check_mst_status()
4392 wret = drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_check_mst_status()
4400 bret = intel_dp_get_sink_irq_esi(intel_dp, esi); in intel_dp_check_mst_status()
4410 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_check_mst_status()
4412 intel_dp->is_mst = false; in intel_dp_check_mst_status()
4413 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); in intel_dp_check_mst_status()
4430 intel_dp_check_link_status(struct intel_dp *intel_dp) in intel_dp_check_link_status() argument
4432 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_dp_check_link_status()
4433 struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_check_link_status()
4446 if (!intel_dp_get_link_status(intel_dp, link_status)) { in intel_dp_check_link_status()
4451 if (!intel_dp_get_dpcd(intel_dp)) { in intel_dp_check_link_status()
4456 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_check_link_status()
4457 intel_dp_get_sink_irq(intel_dp, &sink_irq_vector)) { in intel_dp_check_link_status()
4459 drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_check_link_status()
4469 if (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count)) { in intel_dp_check_link_status()
4472 intel_dp_start_link_train(intel_dp); in intel_dp_check_link_status()
4473 intel_dp_stop_link_train(intel_dp); in intel_dp_check_link_status()
4479 intel_dp_detect_dpcd(struct intel_dp *intel_dp) in intel_dp_detect_dpcd() argument
4481 uint8_t *dpcd = intel_dp->dpcd; in intel_dp_detect_dpcd()
4484 if (!intel_dp_get_dpcd(intel_dp)) in intel_dp_detect_dpcd()
4492 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_detect_dpcd()
4493 intel_dp->downstream_ports[0] & DP_DS_PORT_HPD) { in intel_dp_detect_dpcd()
4496 if (intel_dp_dpcd_read_wake(&intel_dp->aux, DP_SINK_COUNT, in intel_dp_detect_dpcd()
4505 if (drm_probe_ddc(&intel_dp->aux.ddc)) in intel_dp_detect_dpcd()
4509 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) { in intel_dp_detect_dpcd()
4510 type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK; in intel_dp_detect_dpcd()
4515 type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & in intel_dp_detect_dpcd()
4528 edp_detect(struct intel_dp *intel_dp) in edp_detect() argument
4530 struct drm_device *dev = intel_dp_to_dev(intel_dp); in edp_detect()
4688 ironlake_dp_detect(struct intel_dp *intel_dp) in ironlake_dp_detect() argument
4690 struct drm_device *dev = intel_dp_to_dev(intel_dp); in ironlake_dp_detect()
4692 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in ironlake_dp_detect()
4697 return intel_dp_detect_dpcd(intel_dp); in ironlake_dp_detect()
4701 g4x_dp_detect(struct intel_dp *intel_dp) in g4x_dp_detect() argument
4703 struct drm_device *dev = intel_dp_to_dev(intel_dp); in g4x_dp_detect()
4704 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in g4x_dp_detect()
4707 if (is_edp(intel_dp)) { in g4x_dp_detect()
4719 return intel_dp_detect_dpcd(intel_dp); in g4x_dp_detect()
4723 intel_dp_get_edid(struct intel_dp *intel_dp) in intel_dp_get_edid() argument
4725 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_get_edid()
4736 &intel_dp->aux.ddc); in intel_dp_get_edid()
4740 intel_dp_set_edid(struct intel_dp *intel_dp) in intel_dp_set_edid() argument
4742 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_set_edid()
4745 edid = intel_dp_get_edid(intel_dp); in intel_dp_set_edid()
4748 if (intel_dp->force_audio != HDMI_AUDIO_AUTO) in intel_dp_set_edid()
4749 intel_dp->has_audio = intel_dp->force_audio == HDMI_AUDIO_ON; in intel_dp_set_edid()
4751 intel_dp->has_audio = drm_detect_monitor_audio(edid); in intel_dp_set_edid()
4755 intel_dp_unset_edid(struct intel_dp *intel_dp) in intel_dp_unset_edid() argument
4757 struct intel_connector *intel_connector = intel_dp->attached_connector; in intel_dp_unset_edid()
4762 intel_dp->has_audio = false; in intel_dp_unset_edid()
4768 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_detect() local
4769 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_dp_detect()
4779 intel_dp_unset_edid(intel_dp); in intel_dp_detect()
4781 if (intel_dp->is_mst) { in intel_dp_detect()
4792 if (is_edp(intel_dp)) in intel_dp_detect()
4793 status = edp_detect(intel_dp); in intel_dp_detect()
4795 status = ironlake_dp_detect(intel_dp); in intel_dp_detect()
4797 status = g4x_dp_detect(intel_dp); in intel_dp_detect()
4801 intel_dp_probe_oui(intel_dp); in intel_dp_detect()
4803 ret = intel_dp_probe_mst(intel_dp); in intel_dp_detect()
4813 intel_dp_set_edid(intel_dp); in intel_dp_detect()
4820 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 && in intel_dp_detect()
4821 intel_dp_get_sink_irq(intel_dp, &sink_irq_vector)) { in intel_dp_detect()
4823 drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_detect()
4828 intel_dp_handle_test_request(intel_dp); in intel_dp_detect()
4841 struct intel_dp *intel_dp = intel_attached_dp(connector); in intel_dp_force() local
4842 struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; in intel_dp_force()
4848 intel_dp_unset_edid(intel_dp); in intel_dp_force()
4856 intel_dp_set_edid(intel_dp); in intel_dp_force()
4913 struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); in intel_dp_set_property() local
4924 if (i == intel_dp->force_audio) in intel_dp_set_property()
4927 intel_dp->force_audio = i; in intel_dp_set_property()
4934 if (has_audio == intel_dp->has_audio) in intel_dp_set_property()
4937 intel_dp->has_audio = has_audio; in intel_dp_set_property()
4942 bool old_auto = intel_dp->color_range_auto; in intel_dp_set_property()
4943 bool old_range = intel_dp->limited_color_range; in intel_dp_set_property()
4947 intel_dp->color_range_auto = true; in intel_dp_set_property()
4950 intel_dp->color_range_auto = false; in intel_dp_set_property()
4951 intel_dp->limited_color_range = false; in intel_dp_set_property()
4954 intel_dp->color_range_auto = false; in intel_dp_set_property()
4955 intel_dp->limited_color_range = true; in intel_dp_set_property()
4961 if (old_auto == intel_dp->color_range_auto && in intel_dp_set_property()
4962 old_range == intel_dp->limited_color_range) in intel_dp_set_property()
4968 if (is_edp(intel_dp) && in intel_dp_set_property()
5015 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_encoder_destroy() local
5017 drm_dp_aux_unregister(&intel_dp->aux); in intel_dp_encoder_destroy()
5019 if (is_edp(intel_dp)) { in intel_dp_encoder_destroy()
5020 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_encoder_destroy()
5025 pps_lock(intel_dp); in intel_dp_encoder_destroy()
5026 edp_panel_vdd_off_sync(intel_dp); in intel_dp_encoder_destroy()
5027 pps_unlock(intel_dp); in intel_dp_encoder_destroy()
5029 if (intel_dp->edp_notifier.notifier_call) { in intel_dp_encoder_destroy()
5030 unregister_reboot_notifier(&intel_dp->edp_notifier); in intel_dp_encoder_destroy()
5031 intel_dp->edp_notifier.notifier_call = NULL; in intel_dp_encoder_destroy()
5040 struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base); in intel_dp_encoder_suspend() local
5042 if (!is_edp(intel_dp)) in intel_dp_encoder_suspend()
5049 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_encoder_suspend()
5050 pps_lock(intel_dp); in intel_dp_encoder_suspend()
5051 edp_panel_vdd_off_sync(intel_dp); in intel_dp_encoder_suspend()
5052 pps_unlock(intel_dp); in intel_dp_encoder_suspend()
5055 static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) in intel_edp_panel_vdd_sanitize() argument
5057 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_edp_panel_vdd_sanitize()
5064 if (!edp_have_panel_vdd(intel_dp)) in intel_edp_panel_vdd_sanitize()
5077 edp_panel_vdd_schedule_off(intel_dp); in intel_edp_panel_vdd_sanitize()
5082 struct intel_dp *intel_dp; in intel_dp_encoder_reset() local
5087 intel_dp = enc_to_intel_dp(encoder); in intel_dp_encoder_reset()
5089 pps_lock(intel_dp); in intel_dp_encoder_reset()
5096 vlv_initial_power_sequencer_setup(intel_dp); in intel_dp_encoder_reset()
5098 intel_edp_panel_vdd_sanitize(intel_dp); in intel_dp_encoder_reset()
5100 pps_unlock(intel_dp); in intel_dp_encoder_reset()
5129 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_hpd_pulse() local
5161 intel_dp->train_set_valid = false; in intel_dp_hpd_pulse()
5166 if (!intel_dp_get_dpcd(intel_dp)) { in intel_dp_hpd_pulse()
5170 intel_dp_probe_oui(intel_dp); in intel_dp_hpd_pulse()
5172 if (!intel_dp_probe_mst(intel_dp)) { in intel_dp_hpd_pulse()
5174 intel_dp_check_link_status(intel_dp); in intel_dp_hpd_pulse()
5179 if (intel_dp->is_mst) { in intel_dp_hpd_pulse()
5180 if (intel_dp_check_mst_status(intel_dp) == -EINVAL) in intel_dp_hpd_pulse()
5184 if (!intel_dp->is_mst) { in intel_dp_hpd_pulse()
5186 intel_dp_check_link_status(intel_dp); in intel_dp_hpd_pulse()
5196 if (intel_dp->is_mst) { in intel_dp_hpd_pulse()
5197 …DRM_DEBUG_KMS("MST device may have disappeared %d vs %d\n", intel_dp->is_mst, intel_dp->mst_mgr.ms… in intel_dp_hpd_pulse()
5198 intel_dp->is_mst = false; in intel_dp_hpd_pulse()
5199 drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr, intel_dp->is_mst); in intel_dp_hpd_pulse()
5213 struct intel_dp *intel_dp; in intel_trans_dp_port_sel() local
5216 intel_dp = enc_to_intel_dp(&intel_encoder->base); in intel_trans_dp_port_sel()
5220 return intel_dp->output_reg; in intel_trans_dp_port_sel()
5264 intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) in intel_dp_add_properties() argument
5270 intel_dp->color_range_auto = true; in intel_dp_add_properties()
5272 if (is_edp(intel_dp)) { in intel_dp_add_properties()
5282 static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp) in intel_dp_init_panel_power_timestamps() argument
5284 intel_dp->last_power_cycle = jiffies; in intel_dp_init_panel_power_timestamps()
5285 intel_dp->last_power_on = jiffies; in intel_dp_init_panel_power_timestamps()
5286 intel_dp->last_backlight_off = jiffies; in intel_dp_init_panel_power_timestamps()
5291 struct intel_dp *intel_dp) in intel_dp_init_panel_power_sequencer() argument
5295 *final = &intel_dp->pps_delays; in intel_dp_init_panel_power_sequencer()
5320 enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); in intel_dp_init_panel_power_sequencer()
5330 pp_ctl = ironlake_get_pp_control(intel_dp); in intel_dp_init_panel_power_sequencer()
5397 intel_dp->panel_power_up_delay = get_delay(t1_t3); in intel_dp_init_panel_power_sequencer()
5398 intel_dp->backlight_on_delay = get_delay(t8); in intel_dp_init_panel_power_sequencer()
5399 intel_dp->backlight_off_delay = get_delay(t9); in intel_dp_init_panel_power_sequencer()
5400 intel_dp->panel_power_down_delay = get_delay(t10); in intel_dp_init_panel_power_sequencer()
5401 intel_dp->panel_power_cycle_delay = get_delay(t11_t12); in intel_dp_init_panel_power_sequencer()
5405 intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, in intel_dp_init_panel_power_sequencer()
5406 intel_dp->panel_power_cycle_delay); in intel_dp_init_panel_power_sequencer()
5409 intel_dp->backlight_on_delay, intel_dp->backlight_off_delay); in intel_dp_init_panel_power_sequencer()
5414 struct intel_dp *intel_dp) in intel_dp_init_panel_power_sequencer_registers() argument
5420 enum port port = dp_to_dig_port(intel_dp)->port; in intel_dp_init_panel_power_sequencer_registers()
5421 const struct edp_power_seq *seq = &intel_dp->pps_delays; in intel_dp_init_panel_power_sequencer_registers()
5440 enum pipe pipe = vlv_power_sequencer_pipe(intel_dp); in intel_dp_init_panel_power_sequencer_registers()
5517 struct intel_dp *intel_dp = dev_priv->drrs.dp; in intel_dp_set_drrs_state() local
5527 if (intel_dp == NULL) { in intel_dp_set_drrs_state()
5537 dig_port = dp_to_dig_port(intel_dp); in intel_dp_set_drrs_state()
5553 if (intel_dp->attached_connector->panel.downclock_mode->vrefresh == in intel_dp_set_drrs_state()
5610 void intel_edp_drrs_enable(struct intel_dp *intel_dp) in intel_edp_drrs_enable() argument
5612 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_edp_drrs_enable()
5614 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_edp_drrs_enable()
5631 dev_priv->drrs.dp = intel_dp; in intel_edp_drrs_enable()
5642 void intel_edp_drrs_disable(struct intel_dp *intel_dp) in intel_edp_drrs_disable() argument
5644 struct drm_device *dev = intel_dp_to_dev(intel_dp); in intel_edp_drrs_disable()
5646 struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp); in intel_edp_drrs_disable()
5661 intel_dp->attached_connector->panel. in intel_edp_drrs_disable()
5674 struct intel_dp *intel_dp; in intel_edp_drrs_downclock_work() local
5678 intel_dp = dev_priv->drrs.dp; in intel_edp_drrs_downclock_work()
5680 if (!intel_dp) in intel_edp_drrs_downclock_work()
5693 intel_dp->attached_connector->panel. in intel_edp_drrs_downclock_work()
5882 static bool intel_edp_init_connector(struct intel_dp *intel_dp, in intel_edp_init_connector() argument
5886 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); in intel_edp_init_connector()
5897 if (!is_edp(intel_dp)) in intel_edp_init_connector()
5900 pps_lock(intel_dp); in intel_edp_init_connector()
5901 intel_edp_panel_vdd_sanitize(intel_dp); in intel_edp_init_connector()
5902 pps_unlock(intel_dp); in intel_edp_init_connector()
5905 has_dpcd = intel_dp_get_dpcd(intel_dp); in intel_edp_init_connector()
5908 if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) in intel_edp_init_connector()
5910 intel_dp->dpcd[DP_MAX_DOWNSPREAD] & in intel_edp_init_connector()
5919 pps_lock(intel_dp); in intel_edp_init_connector()
5920 intel_dp_init_panel_power_sequencer_registers(dev, intel_dp); in intel_edp_init_connector()
5921 pps_unlock(intel_dp); in intel_edp_init_connector()
5924 edid = drm_get_edid(connector, &intel_dp->aux.ddc); in intel_edp_init_connector()
5959 intel_dp->edp_notifier.notifier_call = edp_notify_handler; in intel_edp_init_connector()
5960 register_reboot_notifier(&intel_dp->edp_notifier); in intel_edp_init_connector()
5968 pipe = DP_PORT_TO_PIPE_CHV(intel_dp->DP); in intel_edp_init_connector()
5970 pipe = PORT_TO_PIPE(intel_dp->DP); in intel_edp_init_connector()
5973 pipe = intel_dp->pps_pipe; in intel_edp_init_connector()
5994 struct intel_dp *intel_dp = &intel_dig_port->dp; in intel_dp_init_connector() local
6001 intel_dp->pps_pipe = INVALID_PIPE; in intel_dp_init_connector()
6005 intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider; in intel_dp_init_connector()
6007 intel_dp->get_aux_clock_divider = vlv_get_aux_clock_divider; in intel_dp_init_connector()
6009 intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider; in intel_dp_init_connector()
6011 intel_dp->get_aux_clock_divider = ilk_get_aux_clock_divider; in intel_dp_init_connector()
6013 intel_dp->get_aux_clock_divider = i9xx_get_aux_clock_divider; in intel_dp_init_connector()
6016 intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl; in intel_dp_init_connector()
6018 intel_dp->get_aux_send_ctl = i9xx_get_aux_send_ctl; in intel_dp_init_connector()
6021 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_init_connector()
6022 intel_dp->attached_connector = intel_connector; in intel_dp_init_connector()
6038 if (WARN_ON(IS_VALLEYVIEW(dev) && is_edp(intel_dp) && in intel_dp_init_connector()
6052 INIT_DELAYED_WORK(&intel_dp->panel_vdd_work, in intel_dp_init_connector()
6087 if (is_edp(intel_dp)) { in intel_dp_init_connector()
6088 pps_lock(intel_dp); in intel_dp_init_connector()
6089 intel_dp_init_panel_power_timestamps(intel_dp); in intel_dp_init_connector()
6091 vlv_initial_power_sequencer_setup(intel_dp); in intel_dp_init_connector()
6093 intel_dp_init_panel_power_sequencer(dev, intel_dp); in intel_dp_init_connector()
6094 pps_unlock(intel_dp); in intel_dp_init_connector()
6097 intel_dp_aux_init(intel_dp, intel_connector); in intel_dp_init_connector()
6105 if (!intel_edp_init_connector(intel_dp, intel_connector)) { in intel_dp_init_connector()
6106 drm_dp_aux_unregister(&intel_dp->aux); in intel_dp_init_connector()
6107 if (is_edp(intel_dp)) { in intel_dp_init_connector()
6108 cancel_delayed_work_sync(&intel_dp->panel_vdd_work); in intel_dp_init_connector()
6113 pps_lock(intel_dp); in intel_dp_init_connector()
6114 edp_panel_vdd_off_sync(intel_dp); in intel_dp_init_connector()
6115 pps_unlock(intel_dp); in intel_dp_init_connector()
6122 intel_dp_add_properties(intel_dp, connector); in intel_dp_init_connector()