10940 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask);  in intel_gen2_queue_flip()
10941 	intel_ring_emit(ring, MI_NOOP);  in intel_gen2_queue_flip()
10942 	intel_ring_emit(ring, MI_DISPLAY_FLIP |  in intel_gen2_queue_flip()
10944 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen2_queue_flip()
10945 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen2_queue_flip()
10946 	intel_ring_emit(ring, 0); /* aux display base address, unused */  in intel_gen2_queue_flip()
10972 	intel_ring_emit(ring, MI_WAIT_FOR_EVENT | flip_mask);  in intel_gen3_queue_flip()
10973 	intel_ring_emit(ring, MI_NOOP);  in intel_gen3_queue_flip()
10974 	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 |  in intel_gen3_queue_flip()
10976 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen3_queue_flip()
10977 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen3_queue_flip()
10978 	intel_ring_emit(ring, MI_NOOP);  in intel_gen3_queue_flip()
11005 	intel_ring_emit(ring, MI_DISPLAY_FLIP |  in intel_gen4_queue_flip()
11007 	intel_ring_emit(ring, fb->pitches[0]);  in intel_gen4_queue_flip()
11008 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset |  in intel_gen4_queue_flip()
11017 	intel_ring_emit(ring, pf | pipesrc);  in intel_gen4_queue_flip()
11040 	intel_ring_emit(ring, MI_DISPLAY_FLIP |  in intel_gen6_queue_flip()
11042 	intel_ring_emit(ring, fb->pitches[0] | obj->tiling_mode);  in intel_gen6_queue_flip()
11043 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen6_queue_flip()
11053 	intel_ring_emit(ring, pf | pipesrc);  in intel_gen6_queue_flip()
11126 		intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1));  in intel_gen7_queue_flip()
11127 		intel_ring_emit(ring, DERRMR);  in intel_gen7_queue_flip()
11128 		intel_ring_emit(ring, ~(DERRMR_PIPEA_PRI_FLIP_DONE |  in intel_gen7_queue_flip()
11132 			intel_ring_emit(ring, MI_STORE_REGISTER_MEM_GEN8 |  in intel_gen7_queue_flip()
11135 			intel_ring_emit(ring, MI_STORE_REGISTER_MEM |  in intel_gen7_queue_flip()
11137 		intel_ring_emit(ring, DERRMR);  in intel_gen7_queue_flip()
11138 		intel_ring_emit(ring, ring->scratch.gtt_offset + 256);  in intel_gen7_queue_flip()
11140 			intel_ring_emit(ring, 0);  in intel_gen7_queue_flip()
11141 			intel_ring_emit(ring, MI_NOOP);  in intel_gen7_queue_flip()
11145 	intel_ring_emit(ring, MI_DISPLAY_FLIP_I915 | plane_bit);  in intel_gen7_queue_flip()
11146 	intel_ring_emit(ring, (fb->pitches[0] | obj->tiling_mode));  in intel_gen7_queue_flip()
11147 	intel_ring_emit(ring, intel_crtc->unpin_work->gtt_offset);  in intel_gen7_queue_flip()
11148 	intel_ring_emit(ring, (MI_NOOP));  in intel_gen7_queue_flip()