3203 	dev_priv->display.update_primary_plane(crtc, fb, x, y);  in intel_pipe_set_base_atomic()
3298 	if (dev_priv->display.hpd_irq_setup)  in intel_finish_reset()
3299 		dev_priv->display.hpd_irq_setup(dev);  in intel_finish_reset()
4165 	dev_priv->display.fdi_link_train(crtc);  in ironlake_pch_enable()
5015 		dev_priv->display.fdi_link_train(crtc);  in haswell_crtc_enable()
5366 	if (dev_priv->display.modeset_commit_cdclk) {  in modeset_update_crtc_power_domains()
5371 			dev_priv->display.modeset_commit_cdclk(state);  in modeset_update_crtc_power_domains()
5446 	dev_priv->cdclk_freq = dev_priv->display.get_display_clock_speed(dev);  in intel_update_cdclk()
5867 	WARN_ON(dev_priv->display.get_display_clock_speed(dev)  in valleyview_set_cdclk()
5932 	WARN_ON(dev_priv->display.get_display_clock_speed(dev)  in cherryview_set_cdclk()
6332 	dev_priv->display.crtc_disable(crtc);  in intel_crtc_disable_noatomic()
7942 		ok = dev_priv->display.find_dpll(limit, crtc_state,  in i9xx_crtc_compute_clock()
8790 	ret = dev_priv->display.find_dpll(limit, crtc_state,  in ironlake_compute_clocks()
11543 		ret = dev_priv->display.queue_flip(dev, crtc, fb, obj, request,  in intel_crtc_page_flip()
11869 	    dev_priv->display.crtc_compute_clock &&  in intel_crtc_atomic_check()
11871 		ret = dev_priv->display.crtc_compute_clock(intel_crtc,  in intel_crtc_atomic_check()
12774 		active = dev_priv->display.get_pipe_config(intel_crtc,  in check_crtc_state()
12942 	if (!dev_priv->display.crtc_compute_clock)  in intel_modeset_clear_plls()
13076 	if (dev_priv->display.modeset_calc_cdclk) {  in intel_modeset_checks()
13079 		ret = dev_priv->display.modeset_calc_cdclk(state);  in intel_modeset_checks()
13228 			dev_priv->display.crtc_disable(crtc);  in intel_atomic_commit()
13255 			dev_priv->display.crtc_enable(crtc);  in intel_atomic_commit()
13587 	dev_priv->display.update_primary_plane(crtc, fb,  in intel_commit_primary_plane()
13599 	dev_priv->display.update_primary_plane(crtc, NULL, 0, 0);  in intel_disable_primary_plane()
14502 		dev_priv->display.find_dpll = g4x_find_best_dpll;  in intel_init_display()
14504 		dev_priv->display.find_dpll = chv_find_best_dpll;  in intel_init_display()
14506 		dev_priv->display.find_dpll = vlv_find_best_dpll;  in intel_init_display()
14508 		dev_priv->display.find_dpll = pnv_find_best_dpll;  in intel_init_display()
14510 		dev_priv->display.find_dpll = i9xx_find_best_dpll;  in intel_init_display()
14513 		dev_priv->display.get_pipe_config = haswell_get_pipe_config;  in intel_init_display()
14514 		dev_priv->display.get_initial_plane_config =  in intel_init_display()
14516 		dev_priv->display.crtc_compute_clock =  in intel_init_display()
14518 		dev_priv->display.crtc_enable = haswell_crtc_enable;  in intel_init_display()
14519 		dev_priv->display.crtc_disable = haswell_crtc_disable;  in intel_init_display()
14520 		dev_priv->display.update_primary_plane =  in intel_init_display()
14523 		dev_priv->display.get_pipe_config = haswell_get_pipe_config;  in intel_init_display()
14524 		dev_priv->display.get_initial_plane_config =  in intel_init_display()
14526 		dev_priv->display.crtc_compute_clock =  in intel_init_display()
14528 		dev_priv->display.crtc_enable = haswell_crtc_enable;  in intel_init_display()
14529 		dev_priv->display.crtc_disable = haswell_crtc_disable;  in intel_init_display()
14530 		dev_priv->display.update_primary_plane =  in intel_init_display()
14533 		dev_priv->display.get_pipe_config = ironlake_get_pipe_config;  in intel_init_display()
14534 		dev_priv->display.get_initial_plane_config =  in intel_init_display()
14536 		dev_priv->display.crtc_compute_clock =  in intel_init_display()
14538 		dev_priv->display.crtc_enable = ironlake_crtc_enable;  in intel_init_display()
14539 		dev_priv->display.crtc_disable = ironlake_crtc_disable;  in intel_init_display()
14540 		dev_priv->display.update_primary_plane =  in intel_init_display()
14543 		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;  in intel_init_display()
14544 		dev_priv->display.get_initial_plane_config =  in intel_init_display()
14546 		dev_priv->display.crtc_compute_clock = i9xx_crtc_compute_clock;  in intel_init_display()
14547 		dev_priv->display.crtc_enable = valleyview_crtc_enable;  in intel_init_display()
14548 		dev_priv->display.crtc_disable = i9xx_crtc_disable;  in intel_init_display()
14549 		dev_priv->display.update_primary_plane =  in intel_init_display()
14552 		dev_priv->display.get_pipe_config = i9xx_get_pipe_config;  in intel_init_display()
14553 		dev_priv->display.get_initial_plane_config =  in intel_init_display()
14555 		dev_priv->display.crtc_compute_clock = i9xx_crtc_compute_clock;  in intel_init_display()
14556 		dev_priv->display.crtc_enable = i9xx_crtc_enable;  in intel_init_display()
14557 		dev_priv->display.crtc_disable = i9xx_crtc_disable;  in intel_init_display()
14558 		dev_priv->display.update_primary_plane =  in intel_init_display()
14564 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14567 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14570 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14573 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14576 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14579 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14583 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14586 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14589 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14592 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14595 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14598 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14601 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14604 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14607 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14610 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14613 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14617 		dev_priv->display.get_display_clock_speed =  in intel_init_display()
14622 		dev_priv->display.fdi_link_train = ironlake_fdi_link_train;  in intel_init_display()
14624 		dev_priv->display.fdi_link_train = gen6_fdi_link_train;  in intel_init_display()
14627 		dev_priv->display.fdi_link_train = ivb_manual_fdi_link_train;  in intel_init_display()
14629 		dev_priv->display.fdi_link_train = hsw_fdi_link_train;  in intel_init_display()
14631 			dev_priv->display.modeset_commit_cdclk =  in intel_init_display()
14633 			dev_priv->display.modeset_calc_cdclk =  in intel_init_display()
14637 		dev_priv->display.modeset_commit_cdclk =  in intel_init_display()
14639 		dev_priv->display.modeset_calc_cdclk =  in intel_init_display()
14642 		dev_priv->display.modeset_commit_cdclk =  in intel_init_display()
14644 		dev_priv->display.modeset_calc_cdclk =  in intel_init_display()
14650 		dev_priv->display.queue_flip = intel_gen2_queue_flip;  in intel_init_display()
14654 		dev_priv->display.queue_flip = intel_gen3_queue_flip;  in intel_init_display()
14659 		dev_priv->display.queue_flip = intel_gen4_queue_flip;  in intel_init_display()
14663 		dev_priv->display.queue_flip = intel_gen6_queue_flip;  in intel_init_display()
14667 		dev_priv->display.queue_flip = intel_gen7_queue_flip;  in intel_init_display()
14673 		dev_priv->display.queue_flip = intel_default_queue_flip;  in intel_init_display()
14988 		dev_priv->display.get_initial_plane_config(crtc,  in intel_modeset_init()
15274 		crtc->active = dev_priv->display.get_pipe_config(crtc,  in intel_modeset_readout_hw_state()