Lines Matching refs:PCH_DREF_CONTROL
1458 val = I915_READ(PCH_DREF_CONTROL); in ibx_assert_pch_refclk_enabled()
8271 val = I915_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
8329 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
8330 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
8345 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
8346 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
8356 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
8357 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
8367 I915_WRITE(PCH_DREF_CONTROL, val); in ironlake_init_pch_refclk()
8368 POSTING_READ(PCH_DREF_CONTROL); in ironlake_init_pch_refclk()
14907 bool bios_lvds_use_ssc = !!(I915_READ(PCH_DREF_CONTROL) & in intel_modeset_init()