2848 	if (IS_HASWELL(dev) || IS_BROADWELL(dev))  in ironlake_update_primary_plane()
2877 	if (!IS_HASWELL(dev) && !IS_BROADWELL(dev))  in ironlake_update_primary_plane()
2890 		if (!IS_HASWELL(dev) && !IS_BROADWELL(dev)) {  in ironlake_update_primary_plane()
2910 	if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {  in ironlake_update_primary_plane()
4570 		if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))  in ironlake_pfit_enable()
4662 	if (IS_HASWELL(dev) && intel_crtc->config->ips_enabled &&  in intel_crtc_load_lut()
5056 	if (IS_HASWELL(dev) && hsw_workaround_pipe != INVALID_PIPE) {  in haswell_crtc_enable()
5384 	    IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))  in intel_compute_max_dotclk()
6510 	if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {  in ironlake_check_fdi_lanes()
6620 	if (IS_HASWELL(dev_priv->dev))  in pipe_config_supports_ips()
7752 	if (IS_HASWELL(dev) && cpu_transcoder == TRANSCODER_EDP &&  in intel_set_pipe_timings()
8728 	if (IS_HASWELL(dev) && intel_crtc->config->dither)  in haswell_set_pipeconf()
9229 	if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {  in ironlake_get_initial_plane_config()
9358 	if (IS_HASWELL(dev))  in assert_can_disable_lcpll()
9380 	if (IS_HASWELL(dev))  in hsw_read_dcomp()
9390 	if (IS_HASWELL(dev)) {  in hsw_write_dcomp()
9914 	if (IS_HASWELL(dev))  in haswell_get_pipe_config()
11501 	} else if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev)) {  in intel_crtc_page_flip()
12560 	if ((INTEL_INFO(dev)->gen < 8 && !IS_HASWELL(dev)) ||  in intel_pipe_config_compare()
12601 	if (IS_HASWELL(dev))  in intel_pipe_config_compare()
13092 	if (IS_HASWELL(dev))  in intel_modeset_checks()
14572 	else if (IS_HASWELL(dev))  in intel_init_display()
14628 	} else if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {  in intel_init_display()
15693 	if (IS_HASWELL(dev) || IS_BROADWELL(dev))  in intel_display_capture_error_state()
15713 		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))  in intel_display_capture_error_state()
15767 	if (IS_HASWELL(dev) || IS_BROADWELL(dev))  in intel_display_print_error_state()
15784 		if (INTEL_INFO(dev)->gen <= 7 && !IS_HASWELL(dev))  in intel_display_print_error_state()