Lines Matching refs:DIV_ROUND_CLOSEST

169 	return DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, divider + 1);  in vlv_get_cck_clock_hpll()
651 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);  in pnv_calc_dpll_params()
652 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in pnv_calc_dpll_params()
668 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n + 2);  in i9xx_calc_dpll_params()
669 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in i9xx_calc_dpll_params()
680 	clock->vco = DIV_ROUND_CLOSEST(refclk * clock->m, clock->n);  in vlv_calc_dpll_params()
681 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in vlv_calc_dpll_params()
694 	clock->dot = DIV_ROUND_CLOSEST(clock->vco, clock->p);  in chv_calc_dpll_params()
973 					clock.m2 = DIV_ROUND_CLOSEST(target * clock.p * clock.n,  in vlv_find_best_dpll()
5894 		divider = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;  in valleyview_set_cdclk()
5951 	cmd = DIV_ROUND_CLOSEST(dev_priv->hpll_freq << 1, cdclk) - 1;  in cherryview_set_cdclk()
7049 	return DIV_ROUND_CLOSEST(vco, div_table[cdclk_sel]);  in i965gm_get_display_clock_speed()
7090 	return DIV_ROUND_CLOSEST(vco, div_table[cdclk_sel]);  in g33_get_display_clock_speed()