373 	struct drm_i915_private *dev_priv = dev->dev_private;  in skl_get_buf_trans_edp()  local
377 		if (dev_priv->edp_low_vswing) {  in skl_get_buf_trans_edp()
385 		if (dev_priv->edp_low_vswing) {  in skl_get_buf_trans_edp()
393 		if (dev_priv->edp_low_vswing) {  in skl_get_buf_trans_edp()
432 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_prepare_ddi_buffers()  local
436 	int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;  in intel_prepare_ddi_buffers()
461 		if (dev_priv->vbt.ddi_port_info[port].hdmi_boost_level ||  in intel_prepare_ddi_buffers()
462 		    dev_priv->vbt.ddi_port_info[port].dp_boost_level)  in intel_prepare_ddi_buffers()
468 		if (dev_priv->edp_low_vswing) {  in intel_prepare_ddi_buffers()
584 static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,  in intel_wait_ddi_buf_idle()  argument
610 	struct drm_i915_private *dev_priv = dev->dev_private;  in hsw_fdi_link_train()  local
626 	rx_ctl_val = dev_priv->fdi_rx_config | FDI_RX_ENHANCE_FRAME_ENABLE |  in hsw_fdi_link_train()
709 		intel_wait_ddi_buf_idle(dev_priv, PORT_E);  in hsw_fdi_link_train()
942 static int hsw_ddi_calc_wrpll_link(struct drm_i915_private *dev_priv, int reg)  in hsw_ddi_calc_wrpll_link()  argument
975 static int skl_calc_wrpll_link(struct drm_i915_private *dev_priv,  in skl_calc_wrpll_link()  argument
1059 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;  in skl_ddi_clock_get()  local
1068 		link_clock = skl_calc_wrpll_link(dev_priv, dpll);  in skl_ddi_clock_get()
1107 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;  in hsw_ddi_clock_get()  local
1123 		link_clock = hsw_ddi_calc_wrpll_link(dev_priv, WRPLL_CTL1);  in hsw_ddi_clock_get()
1126 		link_clock = hsw_ddi_calc_wrpll_link(dev_priv, WRPLL_CTL2);  in hsw_ddi_clock_get()
1151 static int bxt_calc_pll_link(struct drm_i915_private *dev_priv,  in bxt_calc_pll_link()  argument
1162 	pll = &dev_priv->shared_dplls[dpll];  in bxt_calc_pll_link()
1179 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;  in bxt_ddi_clock_get()  local
1183 	pipe_config->port_clock = bxt_calc_pll_link(dev_priv, dpll);  in bxt_ddi_clock_get()
1805 	struct drm_i915_private *dev_priv = crtc->dev->dev_private;  in intel_ddi_set_pipe_settings()  local
1838 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_set_vc_payload_alloc()  local
1855 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_enable_transcoder_func()  local
1951 void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,  in intel_ddi_disable_transcoder_func()  argument
1965 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_connector_get_hw_state()  local
1975 	if (!intel_display_power_is_enabled(dev_priv, power_domain))  in intel_ddi_connector_get_hw_state()
2014 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_get_hw_state()  local
2021 	if (!intel_display_power_is_enabled(dev_priv, power_domain))  in intel_ddi_get_hw_state()
2070 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_enable_pipe_clock()  local
2082 	struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;  in intel_ddi_disable_pipe_clock()  local
2093 	struct drm_i915_private *dev_priv = dev->dev_private;  in skl_ddi_set_iboost()  local
2101 	dp_iboost = dev_priv->vbt.ddi_port_info[port].dp_boost_level;  in skl_ddi_set_iboost()
2102 	hdmi_iboost = dev_priv->vbt.ddi_port_info[port].hdmi_boost_level;  in skl_ddi_set_iboost()
2150 	struct drm_i915_private *dev_priv = dev->dev_private;  in bxt_ddi_vswing_sequence()  local
2155 	if (type == INTEL_OUTPUT_EDP && dev_priv->edp_low_vswing) {  in bxt_ddi_vswing_sequence()
2287 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_pre_enable()  local
2350 			hdmi_level = dev_priv->vbt.  in intel_ddi_pre_enable()
2365 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_post_disable()  local
2384 		intel_wait_ddi_buf_idle(dev_priv, port);  in intel_ddi_post_disable()
2406 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_enable_ddi()  local
2433 		intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);  in intel_enable_ddi()
2445 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_disable_ddi()  local
2449 		intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);  in intel_disable_ddi()
2461 static void hsw_ddi_wrpll_enable(struct drm_i915_private *dev_priv,  in hsw_ddi_wrpll_enable()  argument
2469 static void hsw_ddi_spll_enable(struct drm_i915_private *dev_priv,  in hsw_ddi_spll_enable()  argument
2477 static void hsw_ddi_wrpll_disable(struct drm_i915_private *dev_priv,  in hsw_ddi_wrpll_disable()  argument
2487 static void hsw_ddi_spll_disable(struct drm_i915_private *dev_priv,  in hsw_ddi_spll_disable()  argument
2497 static bool hsw_ddi_wrpll_get_hw_state(struct drm_i915_private *dev_priv,  in hsw_ddi_wrpll_get_hw_state()  argument
2503 	if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PLLS))  in hsw_ddi_wrpll_get_hw_state()
2512 static bool hsw_ddi_spll_get_hw_state(struct drm_i915_private *dev_priv,  in hsw_ddi_spll_get_hw_state()  argument
2518 	if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PLLS))  in hsw_ddi_spll_get_hw_state()
2534 static void hsw_shared_dplls_init(struct drm_i915_private *dev_priv)  in hsw_shared_dplls_init()  argument
2538 	dev_priv->num_shared_dpll = 3;  in hsw_shared_dplls_init()
2541 		dev_priv->shared_dplls[i].id = i;  in hsw_shared_dplls_init()
2542 		dev_priv->shared_dplls[i].name = hsw_ddi_pll_names[i];  in hsw_shared_dplls_init()
2543 		dev_priv->shared_dplls[i].disable = hsw_ddi_wrpll_disable;  in hsw_shared_dplls_init()
2544 		dev_priv->shared_dplls[i].enable = hsw_ddi_wrpll_enable;  in hsw_shared_dplls_init()
2545 		dev_priv->shared_dplls[i].get_hw_state =  in hsw_shared_dplls_init()
2550 	dev_priv->shared_dplls[i].id = i;  in hsw_shared_dplls_init()
2551 	dev_priv->shared_dplls[i].name = hsw_ddi_pll_names[i];  in hsw_shared_dplls_init()
2552 	dev_priv->shared_dplls[i].disable = hsw_ddi_spll_disable;  in hsw_shared_dplls_init()
2553 	dev_priv->shared_dplls[i].enable = hsw_ddi_spll_enable;  in hsw_shared_dplls_init()
2554 	dev_priv->shared_dplls[i].get_hw_state = hsw_ddi_spll_get_hw_state;  in hsw_shared_dplls_init()
2590 static void skl_ddi_pll_enable(struct drm_i915_private *dev_priv,  in skl_ddi_pll_enable()  argument
2622 static void skl_ddi_pll_disable(struct drm_i915_private *dev_priv,  in skl_ddi_pll_disable()  argument
2633 static bool skl_ddi_pll_get_hw_state(struct drm_i915_private *dev_priv,  in skl_ddi_pll_get_hw_state()  argument
2641 	if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PLLS))  in skl_ddi_pll_get_hw_state()
2663 static void skl_shared_dplls_init(struct drm_i915_private *dev_priv)  in skl_shared_dplls_init()  argument
2667 	dev_priv->num_shared_dpll = 3;  in skl_shared_dplls_init()
2669 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {  in skl_shared_dplls_init()
2670 		dev_priv->shared_dplls[i].id = i;  in skl_shared_dplls_init()
2671 		dev_priv->shared_dplls[i].name = skl_ddi_pll_names[i];  in skl_shared_dplls_init()
2672 		dev_priv->shared_dplls[i].disable = skl_ddi_pll_disable;  in skl_shared_dplls_init()
2673 		dev_priv->shared_dplls[i].enable = skl_ddi_pll_enable;  in skl_shared_dplls_init()
2674 		dev_priv->shared_dplls[i].get_hw_state =  in skl_shared_dplls_init()
2679 static void broxton_phy_init(struct drm_i915_private *dev_priv,  in broxton_phy_init()  argument
2782 static void broxton_phy_uninit(struct drm_i915_private *dev_priv,  in broxton_phy_uninit()  argument
2794 	struct drm_i915_private *dev_priv = dev->dev_private;  in broxton_ddi_phy_uninit()  local
2796 	broxton_phy_uninit(dev_priv, DPIO_PHY1);  in broxton_ddi_phy_uninit()
2797 	broxton_phy_uninit(dev_priv, DPIO_PHY0);  in broxton_ddi_phy_uninit()
2809 static void bxt_ddi_pll_enable(struct drm_i915_private *dev_priv,  in bxt_ddi_pll_enable()  argument
2909 static void bxt_ddi_pll_disable(struct drm_i915_private *dev_priv,  in bxt_ddi_pll_disable()  argument
2921 static bool bxt_ddi_pll_get_hw_state(struct drm_i915_private *dev_priv,  in bxt_ddi_pll_get_hw_state()  argument
2928 	if (!intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_PLLS))  in bxt_ddi_pll_get_hw_state()
2983 static void bxt_shared_dplls_init(struct drm_i915_private *dev_priv)  in bxt_shared_dplls_init()  argument
2987 	dev_priv->num_shared_dpll = 3;  in bxt_shared_dplls_init()
2989 	for (i = 0; i < dev_priv->num_shared_dpll; i++) {  in bxt_shared_dplls_init()
2990 		dev_priv->shared_dplls[i].id = i;  in bxt_shared_dplls_init()
2991 		dev_priv->shared_dplls[i].name = bxt_ddi_pll_names[i];  in bxt_shared_dplls_init()
2992 		dev_priv->shared_dplls[i].disable = bxt_ddi_pll_disable;  in bxt_shared_dplls_init()
2993 		dev_priv->shared_dplls[i].enable = bxt_ddi_pll_enable;  in bxt_shared_dplls_init()
2994 		dev_priv->shared_dplls[i].get_hw_state =  in bxt_shared_dplls_init()
3001 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_pll_init()  local
3005 		skl_shared_dplls_init(dev_priv);  in intel_ddi_pll_init()
3007 		bxt_shared_dplls_init(dev_priv);  in intel_ddi_pll_init()
3009 		hsw_shared_dplls_init(dev_priv);  in intel_ddi_pll_init()
3014 		cdclk_freq = dev_priv->display.get_display_clock_speed(dev);  in intel_ddi_pll_init()
3015 		dev_priv->skl_boot_cdclk = cdclk_freq;  in intel_ddi_pll_init()
3019 			intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS);  in intel_ddi_pll_init()
3042 	struct drm_i915_private *dev_priv = encoder->dev->dev_private;  in intel_ddi_prepare_link_retrain()  local
3062 			intel_wait_ddi_buf_idle(dev_priv, port);  in intel_ddi_prepare_link_retrain()
3086 	struct drm_i915_private *dev_priv = crtc->dev->dev_private;  in intel_ddi_fdi_disable()  local
3113 	struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;  in intel_ddi_get_config()  local
3170 	if (intel_display_power_is_enabled(dev_priv, POWER_DOMAIN_AUDIO)) {  in intel_ddi_get_config()
3176 	if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp_bpp &&  in intel_ddi_get_config()
3177 	    pipe_config->pipe_bpp > dev_priv->vbt.edp_bpp) {  in intel_ddi_get_config()
3192 			      pipe_config->pipe_bpp, dev_priv->vbt.edp_bpp);  in intel_ddi_get_config()
3193 		dev_priv->vbt.edp_bpp = pipe_config->pipe_bpp;  in intel_ddi_get_config()
3258 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_ddi_init()  local
3264 	init_hdmi = (dev_priv->vbt.ddi_port_info[port].supports_dvi ||  in intel_ddi_init()
3265 		     dev_priv->vbt.ddi_port_info[port].supports_hdmi);  in intel_ddi_init()
3266 	init_dp = dev_priv->vbt.ddi_port_info[port].supports_dp;  in intel_ddi_init()
3310 		if (IS_BROXTON(dev_priv) && (INTEL_REVID(dev) < BXT_REVID_B0)  in intel_ddi_init()
3312 			dev_priv->hotplug.irq_port[PORT_A] = intel_dig_port;  in intel_ddi_init()
3314 			dev_priv->hotplug.irq_port[port] = intel_dig_port;  in intel_ddi_init()