Lines Matching refs:DP_TP_CTL
645 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
688 I915_WRITE(DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
703 temp = I915_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
706 I915_WRITE(DP_TP_CTL(PORT_E), temp); in hsw_fdi_link_train()
707 POSTING_READ(DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
2378 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_post_disable()
2381 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_post_disable()
3047 if (I915_READ(DP_TP_CTL(port)) & DP_TP_CTL_ENABLE) { in intel_ddi_prepare_link_retrain()
3055 val = I915_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()
3058 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()
3059 POSTING_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()
3074 I915_WRITE(DP_TP_CTL(port), val); in intel_ddi_prepare_link_retrain()
3075 POSTING_READ(DP_TP_CTL(port)); in intel_ddi_prepare_link_retrain()