Lines Matching refs:DDI_BUF_CTL
587 uint32_t reg = DDI_BUF_CTL(port); in intel_wait_ddi_buf_idle()
655 I915_WRITE(DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train()
659 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
697 temp = I915_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
699 I915_WRITE(DDI_BUF_CTL(PORT_E), temp); in hsw_fdi_link_train()
700 POSTING_READ(DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
2024 tmp = I915_READ(DDI_BUF_CTL(port)); in intel_ddi_get_hw_state()
2371 val = I915_READ(DDI_BUF_CTL(port)); in intel_ddi_post_disable()
2374 I915_WRITE(DDI_BUF_CTL(port), val); in intel_ddi_post_disable()
2418 I915_WRITE(DDI_BUF_CTL(port), in intel_enable_ddi()
3048 val = I915_READ(DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
3051 I915_WRITE(DDI_BUF_CTL(port), val); in intel_ddi_prepare_link_retrain()
3078 I915_WRITE(DDI_BUF_CTL(port), intel_dp->DP); in intel_ddi_prepare_link_retrain()
3079 POSTING_READ(DDI_BUF_CTL(port)); in intel_ddi_prepare_link_retrain()
3231 intel_dig_port->dp.output_reg = DDI_BUF_CTL(port); in intel_ddi_init_dp_connector()
3250 intel_dig_port->hdmi.hdmi_reg = DDI_BUF_CTL(port); in intel_ddi_init_hdmi_connector()
3293 intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) & in intel_ddi_init()