Lines Matching refs:u16
35 u16 version; /**< decimal */
36 u16 header_size; /**< in bytes */
37 u16 vbt_size; /**< in bytes */
46 u16 version; /**< decimal */
47 u16 header_size; /**< in bytes */
48 u16 bdb_size; /**< in bytes */
62 u16 code_segment;
212 u16 handle;
213 u16 device_type;
215 u16 addin_offset;
220 u16 edid_ptr;
229 u16 extended_type;
241 u16 handle;
242 u16 device_type;
247 u16 edid_ptr;
314 u16 ssc_bits;
315 u16 ssc_freq;
316 u16 ssc_ddt;
318 u16 panel_color_depth;
327 u16 fp_timing_offset; /* offsets are from start of bdb */
329 u16 dvo_timing_offset;
331 u16 panel_pnp_id_offset;
342 u16 x_res;
343 u16 y_res;
354 u16 terminator;
358 u16 clock; /**< In 10khz */
386 u16 mfg_name;
387 u16 product_code;
410 u16 pwm_freq_hz;
425 u16 aimdb_version;
426 u16 aimdb_header_size;
427 u16 aimdb_size;
432 u16 aimdb_size;
436 u16 fp_timing_offset;
438 u16 dvo_timing_offset;
440 u16 text_fitting_offset;
442 u16 graphics_fitting_offset;
456 u16 als_low_trip;
457 u16 als_high_trip;
483 u16 boot_mode_x;
484 u16 boot_mode_y;
488 u16 enable_lfp_primary:1;
489 u16 selective_mode_pruning:1;
490 u16 dual_frequency:1;
491 u16 render_clock_freq:1; /* 0: high freq; 1: low freq */
492 u16 nt_clone_support:1;
493 u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */
494 u16 sprite_display_assign:1; /* 0: secondary; 1: primary */
495 u16 cui_aspect_scaling:1;
496 u16 preserve_aspect_ratio:1;
497 u16 sdvo_device_power_down:1;
498 u16 crt_hotplug:1;
499 u16 lvds_config:2;
500 u16 tv_hotplug:1;
501 u16 hdmi_config:2;
505 u16 legacy_crt_max_x;
506 u16 legacy_crt_max_y;
512 u16 rmpm_enabled:1;
513 u16 s2ddt_enabled:1;
514 u16 dpst_enabled:1;
515 u16 bltclt_enabled:1;
516 u16 adb_enabled:1;
517 u16 drrs_enabled:1;
518 u16 grs_enabled:1;
519 u16 gpmt_enabled:1;
520 u16 tbt_enabled:1;
521 u16 psr_enabled:1;
522 u16 ips_enabled:1;
523 u16 reserved3:4;
524 u16 pc_feature_valid:1;
545 u16 t1_t3;
546 u16 t8;
547 u16 t9;
548 u16 t10;
549 u16 t11_t12;
566 u16 edp_s3d_feature;
567 u16 edp_t3_optimization;
583 u16 tp1_wakeup_time;
584 u16 tp2_tp3_wakeup_time;
794 u16 panel_id;
832 u16 dual_link:2;
833 u16 lane_cnt:2;
834 u16 pixel_overlap:3;
835 u16 rsvd3:9;
837 u16 rsvd4;
852 u16 dphy_param_valid:1;
853 u16 eot_pkt_disabled:1;
854 u16 enable_clk_stop:1;
855 u16 rsvd7:13;
888 u16 tclk_prepare_clkzero;
894 u16 ths_prepare_hszero;
920 u16 panel_on_delay;
921 u16 bl_enable_delay;
922 u16 bl_disable_delay;
923 u16 panel_off_delay;
924 u16 panel_power_cycle_delay;