175 parse_lfp_panel_data(struct drm_i915_private *dev_priv,  in parse_lfp_panel_data()  argument
190 	dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;  in parse_lfp_panel_data()
205 		dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;  in parse_lfp_panel_data()
209 		dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;  in parse_lfp_panel_data()
213 		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;  in parse_lfp_panel_data()
226 	dev_priv->vbt.lvds_vbt = 1;  in parse_lfp_panel_data()
238 	dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;  in parse_lfp_panel_data()
250 			dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;  in parse_lfp_panel_data()
252 				      dev_priv->vbt.bios_lvds_val);  in parse_lfp_panel_data()
258 parse_lfp_backlight(struct drm_i915_private *dev_priv,  in parse_lfp_backlight()  argument
276 	dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;  in parse_lfp_backlight()
277 	if (!dev_priv->vbt.backlight.present) {  in parse_lfp_backlight()
283 	dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;  in parse_lfp_backlight()
284 	dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;  in parse_lfp_backlight()
285 	dev_priv->vbt.backlight.min_brightness = entry->min_brightness;  in parse_lfp_backlight()
288 		      dev_priv->vbt.backlight.pwm_freq_hz,  in parse_lfp_backlight()
289 		      dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",  in parse_lfp_backlight()
290 		      dev_priv->vbt.backlight.min_brightness,  in parse_lfp_backlight()
296 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,  in parse_sdvo_panel_data()  argument
329 	dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;  in parse_sdvo_panel_data()
350 parse_general_features(struct drm_i915_private *dev_priv,  in parse_general_features()  argument
353 	struct drm_device *dev = dev_priv->dev;  in parse_general_features()
358 		dev_priv->vbt.int_tv_support = general->int_tv_support;  in parse_general_features()
359 		dev_priv->vbt.int_crt_support = general->int_crt_support;  in parse_general_features()
360 		dev_priv->vbt.lvds_use_ssc = general->enable_ssc;  in parse_general_features()
361 		dev_priv->vbt.lvds_ssc_freq =  in parse_general_features()
363 		dev_priv->vbt.display_clock_mode = general->display_clock_mode;  in parse_general_features()
364 		dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;  in parse_general_features()
366 			      dev_priv->vbt.int_tv_support,  in parse_general_features()
367 			      dev_priv->vbt.int_crt_support,  in parse_general_features()
368 			      dev_priv->vbt.lvds_use_ssc,  in parse_general_features()
369 			      dev_priv->vbt.lvds_ssc_freq,  in parse_general_features()
370 			      dev_priv->vbt.display_clock_mode,  in parse_general_features()
371 			      dev_priv->vbt.fdi_rx_polarity_inverted);  in parse_general_features()
376 parse_general_definitions(struct drm_i915_private *dev_priv,  in parse_general_definitions()  argument
387 			if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))  in parse_general_definitions()
388 				dev_priv->vbt.crt_ddc_pin = bus_pin;  in parse_general_definitions()
403 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,  in parse_sdvo_device_mapping()  argument
458 		p_mapping = &(dev_priv->sdvo_mappings[child->dvo_port - 1]);  in parse_sdvo_device_mapping()
493 parse_driver_features(struct drm_i915_private *dev_priv,  in parse_driver_features()  argument
503 		dev_priv->vbt.edp_support = 1;  in parse_driver_features()
506 		dev_priv->render_reclock_avail = true;  in parse_driver_features()
516 		dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;  in parse_driver_features()
520 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)  in parse_edp()  argument
528 		if (dev_priv->vbt.edp_support)  in parse_edp()
535 		dev_priv->vbt.edp_bpp = 18;  in parse_edp()
538 		dev_priv->vbt.edp_bpp = 24;  in parse_edp()
541 		dev_priv->vbt.edp_bpp = 30;  in parse_edp()
549 	dev_priv->vbt.edp_pps = *edp_pps;  in parse_edp()
553 		dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;  in parse_edp()
556 		dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;  in parse_edp()
566 		dev_priv->vbt.edp_lanes = 1;  in parse_edp()
569 		dev_priv->vbt.edp_lanes = 2;  in parse_edp()
572 		dev_priv->vbt.edp_lanes = 4;  in parse_edp()
582 		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;  in parse_edp()
585 		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;  in parse_edp()
588 		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;  in parse_edp()
591 		dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;  in parse_edp()
601 		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;  in parse_edp()
604 		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;  in parse_edp()
607 		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;  in parse_edp()
610 		dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;  in parse_edp()
623 			dev_priv->edp_low_vswing = i915.edp_vswing == 1;  in parse_edp()
626 			dev_priv->edp_low_vswing = vswing == 0;  in parse_edp()
632 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)  in parse_psr()  argument
645 	dev_priv->vbt.psr.full_link = psr_table->full_link;  in parse_psr()
646 	dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;  in parse_psr()
649 	dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :  in parse_psr()
654 		dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;  in parse_psr()
657 		dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;  in parse_psr()
660 		dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;  in parse_psr()
663 		dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;  in parse_psr()
671 	dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;  in parse_psr()
672 	dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;  in parse_psr()
743 parse_mipi(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)  in parse_mipi()  argument
755 	if (!dev_priv->vbt.has_mipi)  in parse_mipi()
759 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;  in parse_mipi()
786 	dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);  in parse_mipi()
787 	if (!dev_priv->vbt.dsi.config)  in parse_mipi()
790 	dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);  in parse_mipi()
791 	if (!dev_priv->vbt.dsi.pps) {  in parse_mipi()
792 		kfree(dev_priv->vbt.dsi.config);  in parse_mipi()
797 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;  in parse_mipi()
819 	dev_priv->vbt.dsi.seq_version = sequence->version;  in parse_mipi()
854 	dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);  in parse_mipi()
855 	if (!dev_priv->vbt.dsi.data)  in parse_mipi()
862 	data = dev_priv->vbt.dsi.data;  in parse_mipi()
863 	dev_priv->vbt.dsi.size = seq_size;  in parse_mipi()
869 			dev_priv->vbt.dsi.sequence[seq_id] = data;  in parse_mipi()
891 	kfree(dev_priv->vbt.dsi.data);  in parse_mipi()
892 	dev_priv->vbt.dsi.data = NULL;  in parse_mipi()
896 	memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));  in parse_mipi()
910 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,  in parse_ddi_port()  argument
914 	struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];  in parse_ddi_port()
931 	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {  in parse_ddi_port()
932 		it = dev_priv->vbt.child_dev + i;  in parse_ddi_port()
991 				dev_priv->vbt.ddi_port_info[PORT_B].supports_dvi = 0;  in parse_ddi_port()
992 				dev_priv->vbt.ddi_port_info[PORT_B].supports_hdmi = 0;  in parse_ddi_port()
994 				dev_priv->vbt.ddi_port_info[PORT_C].supports_dvi = 0;  in parse_ddi_port()
995 				dev_priv->vbt.ddi_port_info[PORT_C].supports_hdmi = 0;  in parse_ddi_port()
997 				dev_priv->vbt.ddi_port_info[PORT_D].supports_dvi = 0;  in parse_ddi_port()
998 				dev_priv->vbt.ddi_port_info[PORT_D].supports_hdmi = 0;  in parse_ddi_port()
1016 				dev_priv->vbt.ddi_port_info[PORT_A].supports_dp = 0;  in parse_ddi_port()
1018 				dev_priv->vbt.ddi_port_info[PORT_B].supports_dp = 0;  in parse_ddi_port()
1020 				dev_priv->vbt.ddi_port_info[PORT_C].supports_dp = 0;  in parse_ddi_port()
1022 				dev_priv->vbt.ddi_port_info[PORT_D].supports_dp = 0;  in parse_ddi_port()
1054 static void parse_ddi_ports(struct drm_i915_private *dev_priv,  in parse_ddi_ports()  argument
1057 	struct drm_device *dev = dev_priv->dev;  in parse_ddi_ports()
1063 	if (!dev_priv->vbt.child_dev_num)  in parse_ddi_ports()
1070 		parse_ddi_port(dev_priv, port, bdb);  in parse_ddi_ports()
1074 parse_device_mapping(struct drm_i915_private *dev_priv,  in parse_device_mapping()  argument
1133 	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);  in parse_device_mapping()
1134 	if (!dev_priv->vbt.child_dev) {  in parse_device_mapping()
1139 	dev_priv->vbt.child_dev_num = count;  in parse_device_mapping()
1152 			dev_priv->vbt.has_mipi = 1;  in parse_device_mapping()
1153 			dev_priv->vbt.dsi.port = p_child->common.dvo_port;  in parse_device_mapping()
1156 		child_dev_ptr = dev_priv->vbt.child_dev + count;  in parse_device_mapping()
1171 init_vbt_defaults(struct drm_i915_private *dev_priv)  in init_vbt_defaults()  argument
1173 	struct drm_device *dev = dev_priv->dev;  in init_vbt_defaults()
1176 	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;  in init_vbt_defaults()
1179 	dev_priv->vbt.backlight.present = true;  in init_vbt_defaults()
1182 	dev_priv->vbt.lvds_dither = 1;  in init_vbt_defaults()
1183 	dev_priv->vbt.lvds_vbt = 0;  in init_vbt_defaults()
1186 	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;  in init_vbt_defaults()
1189 	dev_priv->vbt.int_tv_support = 1;  in init_vbt_defaults()
1190 	dev_priv->vbt.int_crt_support = 1;  in init_vbt_defaults()
1193 	dev_priv->vbt.lvds_use_ssc = 1;  in init_vbt_defaults()
1198 	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,  in init_vbt_defaults()
1200 	DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);  in init_vbt_defaults()
1204 			&dev_priv->vbt.ddi_port_info[port];  in init_vbt_defaults()
1306 	struct drm_i915_private *dev_priv = dev->dev_private;  in intel_parse_bios()  local
1314 	init_vbt_defaults(dev_priv);  in intel_parse_bios()
1317 	if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)  in intel_parse_bios()
1318 		bdb = validate_vbt(dev_priv->opregion.header, OPREGION_SIZE,  in intel_parse_bios()
1319 				   dev_priv->opregion.vbt, "OpRegion");  in intel_parse_bios()
1336 	parse_general_features(dev_priv, bdb);  in intel_parse_bios()
1337 	parse_general_definitions(dev_priv, bdb);  in intel_parse_bios()
1338 	parse_lfp_panel_data(dev_priv, bdb);  in intel_parse_bios()
1339 	parse_lfp_backlight(dev_priv, bdb);  in intel_parse_bios()
1340 	parse_sdvo_panel_data(dev_priv, bdb);  in intel_parse_bios()
1341 	parse_sdvo_device_mapping(dev_priv, bdb);  in intel_parse_bios()
1342 	parse_device_mapping(dev_priv, bdb);  in intel_parse_bios()
1343 	parse_driver_features(dev_priv, bdb);  in intel_parse_bios()
1344 	parse_edp(dev_priv, bdb);  in intel_parse_bios()
1345 	parse_psr(dev_priv, bdb);  in intel_parse_bios()
1346 	parse_mipi(dev_priv, bdb);  in intel_parse_bios()
1347 	parse_ddi_ports(dev_priv, bdb);  in intel_parse_bios()