174 			seq_puts(m, ")");  in describe_obj()
220 		seq_puts(m, "Active:\n");  in i915_gem_object_list_info()
224 		seq_puts(m, "Inactive:\n");  in i915_gem_object_list_info()
298 	seq_puts(m, "Stolen:\n");  in i915_gem_stolen_list_info()
301 		seq_puts(m, "   ");  in i915_gem_stolen_list_info()
547 		seq_puts(m, "   ");  in i915_gem_gtt_info()
612 				seq_puts(m, "Stall check enabled, ");  in i915_gem_pageflip_info()
614 				seq_puts(m, "Stall check waiting for page flip ioctl, ");  in i915_gem_pageflip_info()
665 				seq_puts(m, "   ");  in i915_gem_batch_pool_info()
725 		seq_puts(m, "No requests\n");  in i915_gem_request_info()
966 			seq_puts(m, "unused");  in i915_gem_fence_regs_info()
1312 		seq_puts(m, "no P-state info available\n");  in i915_frequency_info()
1411 	seq_puts(m, "Current RS state: ");  in ironlake_drpc_info()
1414 		seq_puts(m, "on\n");  in ironlake_drpc_info()
1417 		seq_puts(m, "RC1\n");  in ironlake_drpc_info()
1420 		seq_puts(m, "RC1E\n");  in ironlake_drpc_info()
1423 		seq_puts(m, "RS1\n");  in ironlake_drpc_info()
1426 		seq_puts(m, "RS2 (RC6)\n");  in ironlake_drpc_info()
1429 		seq_puts(m, "RC3 (RC6+)\n");  in ironlake_drpc_info()
1432 		seq_puts(m, "unknown\n");  in ironlake_drpc_info()
1517 		seq_puts(m, "RC information inaccurate because somebody "  in gen6_drpc_info()
1553 	seq_puts(m, "Current RC state: ");  in gen6_drpc_info()
1557 			seq_puts(m, "Core Power Down\n");  in gen6_drpc_info()
1559 			seq_puts(m, "on\n");  in gen6_drpc_info()
1562 		seq_puts(m, "RC3\n");  in gen6_drpc_info()
1565 		seq_puts(m, "RC6\n");  in gen6_drpc_info()
1568 		seq_puts(m, "RC7\n");  in gen6_drpc_info()
1571 		seq_puts(m, "Unknown\n");  in gen6_drpc_info()
1632 		seq_puts(m, "FBC unsupported on this chipset\n");  in i915_fbc_status()
1640 		seq_puts(m, "FBC enabled\n");  in i915_fbc_status()
1702 		seq_puts(m, "not supported\n");  in i915_ips_status()
1712 		seq_puts(m, "Currently: unknown\n");  in i915_ips_status()
1715 			seq_puts(m, "Currently: enabled\n");  in i915_ips_status()
1717 			seq_puts(m, "Currently: disabled\n");  in i915_ips_status()
1792 		seq_puts(m, "unsupported on this chipset\n");  in i915_ring_freq_table()
1815 	seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");  in i915_ring_freq_table()
1936 		seq_puts(m, "HW context ");  in i915_context_status()
1990 		seq_puts(m, "\tNot bound in GGTT\n");  in i915_dump_lrc_obj()
1995 		seq_puts(m, "\tFailed to get pages for context object\n");  in i915_dump_lrc_obj()
2062 		seq_puts(m, "Logical Ring Contexts are disabled\n");  in i915_execlists()
2199 		seq_puts(m, "L-shaped memory detected\n");  in i915_swizzle_info()
2220 		seq_puts(m, "  default context:\n");  in per_file_ctx()
2269 		seq_puts(m, "aliasing PPGTT:\n");  in gen6_ppgtt_info()
2415 	seq_puts(m, "\nScratch registers:\n");  in i915_guc_load_status_info()
2536 		seq_puts(m, "PSR not supported\n");  in i915_edp_psr_status()
2571 	seq_puts(m, "\n");  in i915_edp_psr_status()
2659 		seq_puts(m, "not supported\n");  in i915_runtime_pm_status()
2843 		seq_puts(m, "\tprimary plane disabled\n");  in intel_crtc_info()
3010 		seq_puts(m, "Semaphores are disabled\n");  in i915_semaphore_status()
3031 			seq_puts(m, "  Last signal:");  in i915_semaphore_status()
3039 			seq_puts(m, "  Last wait:  ");  in i915_semaphore_status()
3050 		seq_puts(m, "  Last signal:");  in i915_semaphore_status()
3058 	seq_puts(m, "\nSync seqno:\n");  in i915_semaphore_status()
3184 			seq_puts(m, "eDP:\n");  in drrs_status_per_crtc()
3187 			seq_puts(m, "DSI:\n");  in drrs_status_per_crtc()
3190 			seq_puts(m, "HDMI:\n");  in drrs_status_per_crtc()
3193 			seq_puts(m, "DP:\n");  in drrs_status_per_crtc()
3203 		seq_puts(m, "\tVBT: DRRS_type: Static");  in drrs_status_per_crtc()
3205 		seq_puts(m, "\tVBT: DRRS_type: Seamless");  in drrs_status_per_crtc()
3207 		seq_puts(m, "\tVBT: DRRS_type: None");  in drrs_status_per_crtc()
3209 		seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value");  in drrs_status_per_crtc()
3211 	seq_puts(m, "\n\n");  in drrs_status_per_crtc()
3218 		seq_puts(m, "\tDRRS Supported: Yes\n");  in drrs_status_per_crtc()
3222 			seq_puts(m, "Idleness DRRS: Disabled");  in drrs_status_per_crtc()
3231 		seq_puts(m, "\n\t\t");  in drrs_status_per_crtc()
3233 			seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");  in drrs_status_per_crtc()
3236 			seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");  in drrs_status_per_crtc()
3246 		seq_puts(m, "\n\t\t");  in drrs_status_per_crtc()
3250 		seq_puts(m, "\tDRRS Supported : No");  in drrs_status_per_crtc()
3252 	seq_puts(m, "\n");  in drrs_status_per_crtc()
3276 		seq_puts(m, "No active crtc found\n");  in i915_drrs_status()
4226 				seq_puts(m, "1");  in i915_displayport_test_active_show()
4228 				seq_puts(m, "0");  in i915_displayport_test_active_show()
4230 			seq_puts(m, "0");  in i915_displayport_test_active_show()
4271 			seq_puts(m, "0");  in i915_displayport_test_data_show()
4310 			seq_puts(m, "0");  in i915_displayport_test_type_show()
5089 	seq_puts(m, "SSEU Device Info\n");  in i915_sseu_status()
5107 	seq_puts(m, "SSEU Device Status\n");  in i915_sseu_status()