1133 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);  in i915_frequency_info()
1242 			   dev_priv->rps.up_threshold);  in i915_frequency_info()
1251 			   dev_priv->rps.down_threshold);  in i915_frequency_info()
1270 			   intel_gpu_freq(dev_priv, dev_priv->rps.max_freq));  in i915_frequency_info()
1273 			   intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq));  in i915_frequency_info()
1276 			   intel_gpu_freq(dev_priv, dev_priv->rps.idle_freq));  in i915_frequency_info()
1278 			   intel_gpu_freq(dev_priv, dev_priv->rps.min_freq));  in i915_frequency_info()
1280 			   intel_gpu_freq(dev_priv, dev_priv->rps.max_freq));  in i915_frequency_info()
1283 			   intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq));  in i915_frequency_info()
1287 		mutex_lock(&dev_priv->rps.hw_lock);  in i915_frequency_info()
1296 			   intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq));  in i915_frequency_info()
1299 			   intel_gpu_freq(dev_priv, dev_priv->rps.max_freq));  in i915_frequency_info()
1302 			   intel_gpu_freq(dev_priv, dev_priv->rps.min_freq));  in i915_frequency_info()
1305 			   intel_gpu_freq(dev_priv, dev_priv->rps.idle_freq));  in i915_frequency_info()
1309 			   intel_gpu_freq(dev_priv, dev_priv->rps.efficient_freq));  in i915_frequency_info()
1310 		mutex_unlock(&dev_priv->rps.hw_lock);  in i915_frequency_info()
1532 	mutex_lock(&dev_priv->rps.hw_lock);  in gen6_drpc_info()
1534 	mutex_unlock(&dev_priv->rps.hw_lock);  in gen6_drpc_info()
1798 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);  in i915_ring_freq_table()
1800 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);  in i915_ring_freq_table()
1807 			dev_priv->rps.min_freq_softlimit / GEN9_FREQ_SCALER;  in i915_ring_freq_table()
1809 			dev_priv->rps.max_freq_softlimit / GEN9_FREQ_SCALER;  in i915_ring_freq_table()
1811 		min_gpu_freq = dev_priv->rps.min_freq_softlimit;  in i915_ring_freq_table()
1812 		max_gpu_freq = dev_priv->rps.max_freq_softlimit;  in i915_ring_freq_table()
1829 	mutex_unlock(&dev_priv->rps.hw_lock);  in i915_ring_freq_table()
2336 	seq_printf(m, "RPS enabled? %d\n", dev_priv->rps.enabled);  in i915_rps_boost_info()
2340 		   intel_gpu_freq(dev_priv, dev_priv->rps.cur_freq),  in i915_rps_boost_info()
2341 		   intel_gpu_freq(dev_priv, dev_priv->rps.min_freq),  in i915_rps_boost_info()
2342 		   intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit),  in i915_rps_boost_info()
2343 		   intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit),  in i915_rps_boost_info()
2344 		   intel_gpu_freq(dev_priv, dev_priv->rps.max_freq));  in i915_rps_boost_info()
2345 	spin_lock(&dev_priv->rps.client_lock);  in i915_rps_boost_info()
2355 			   file_priv->rps.boosts,  in i915_rps_boost_info()
2356 			   list_empty(&file_priv->rps.link) ? "" : ", active");  in i915_rps_boost_info()
2360 		   dev_priv->rps.semaphores.boosts,  in i915_rps_boost_info()
2361 		   list_empty(&dev_priv->rps.semaphores.link) ? "" : ", active");  in i915_rps_boost_info()
2363 		   dev_priv->rps.mmioflips.boosts,  in i915_rps_boost_info()
2364 		   list_empty(&dev_priv->rps.mmioflips.link) ? "" : ", active");  in i915_rps_boost_info()
2365 	seq_printf(m, "Kernel boosts: %d\n", dev_priv->rps.boosts);  in i915_rps_boost_info()
2366 	spin_unlock(&dev_priv->rps.client_lock);  in i915_rps_boost_info()
4770 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);  in i915_max_freq_get()
4772 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);  in i915_max_freq_get()
4776 	*val = intel_gpu_freq(dev_priv, dev_priv->rps.max_freq_softlimit);  in i915_max_freq_get()
4777 	mutex_unlock(&dev_priv->rps.hw_lock);  in i915_max_freq_get()
4793 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);  in i915_max_freq_set()
4797 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);  in i915_max_freq_set()
4806 	hw_max = dev_priv->rps.max_freq;  in i915_max_freq_set()
4807 	hw_min = dev_priv->rps.min_freq;  in i915_max_freq_set()
4809 	if (val < hw_min || val > hw_max || val < dev_priv->rps.min_freq_softlimit) {  in i915_max_freq_set()
4810 		mutex_unlock(&dev_priv->rps.hw_lock);  in i915_max_freq_set()
4814 	dev_priv->rps.max_freq_softlimit = val;  in i915_max_freq_set()
4818 	mutex_unlock(&dev_priv->rps.hw_lock);  in i915_max_freq_set()
4837 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);  in i915_min_freq_get()
4839 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);  in i915_min_freq_get()
4843 	*val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq_softlimit);  in i915_min_freq_get()
4844 	mutex_unlock(&dev_priv->rps.hw_lock);  in i915_min_freq_get()
4860 	flush_delayed_work(&dev_priv->rps.delayed_resume_work);  in i915_min_freq_set()
4864 	ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);  in i915_min_freq_set()
4873 	hw_max = dev_priv->rps.max_freq;  in i915_min_freq_set()
4874 	hw_min = dev_priv->rps.min_freq;  in i915_min_freq_set()
4876 	if (val < hw_min || val > hw_max || val > dev_priv->rps.max_freq_softlimit) {  in i915_min_freq_set()
4877 		mutex_unlock(&dev_priv->rps.hw_lock);  in i915_min_freq_set()
4881 	dev_priv->rps.min_freq_softlimit = val;  in i915_min_freq_set()
4885 	mutex_unlock(&dev_priv->rps.hw_lock);  in i915_min_freq_set()