Lines Matching refs:m
75 static int i915_capabilities(struct seq_file *m, void *data) in i915_capabilities() argument
77 struct drm_info_node *node = m->private; in i915_capabilities()
81 seq_printf(m, "gen: %d\n", info->gen); in i915_capabilities()
82 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev)); in i915_capabilities()
83 #define PRINT_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x)) in i915_capabilities()
130 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) in describe_obj() argument
138 seq_printf(m, "%pK: %s%s%s%s %8zdKiB %02x %02x [ ", in describe_obj()
148 seq_printf(m, "%x ", in describe_obj()
150 seq_printf(m, "] %x %x%s%s%s", in describe_obj()
157 seq_printf(m, " (name: %d)", obj->base.name); in describe_obj()
162 seq_printf(m, " (pinned x %d)", pin_count); in describe_obj()
164 seq_printf(m, " (display)"); in describe_obj()
166 seq_printf(m, " (fence: %d)", obj->fence_reg); in describe_obj()
168 seq_printf(m, " (%sgtt offset: %08llx, size: %08llx", in describe_obj()
172 seq_printf(m, ", type: %u)", vma->ggtt_view.type); in describe_obj()
174 seq_puts(m, ")"); in describe_obj()
177 seq_printf(m, " (stolen: %08llx)", obj->stolen->start); in describe_obj()
185 seq_printf(m, " (%s mappable)", s); in describe_obj()
188 seq_printf(m, " (%s)", in describe_obj()
191 seq_printf(m, " (frontbuffer: 0x%03x)", obj->frontbuffer_bits); in describe_obj()
194 static void describe_ctx(struct seq_file *m, struct intel_context *ctx) in describe_ctx() argument
196 seq_putc(m, ctx->legacy_hw_ctx.initialized ? 'I' : 'i'); in describe_ctx()
197 seq_putc(m, ctx->remap_slice ? 'R' : 'r'); in describe_ctx()
198 seq_putc(m, ' '); in describe_ctx()
201 static int i915_gem_object_list_info(struct seq_file *m, void *data) in i915_gem_object_list_info() argument
203 struct drm_info_node *node = m->private; in i915_gem_object_list_info()
220 seq_puts(m, "Active:\n"); in i915_gem_object_list_info()
224 seq_puts(m, "Inactive:\n"); in i915_gem_object_list_info()
234 seq_printf(m, " "); in i915_gem_object_list_info()
235 describe_obj(m, vma->obj); in i915_gem_object_list_info()
236 seq_printf(m, "\n"); in i915_gem_object_list_info()
243 seq_printf(m, "Total %d objects, %llu bytes, %llu GTT size\n", in i915_gem_object_list_info()
263 static int i915_gem_stolen_list_info(struct seq_file *m, void *data) in i915_gem_stolen_list_info() argument
265 struct drm_info_node *node = m->private; in i915_gem_stolen_list_info()
298 seq_puts(m, "Stolen:\n"); in i915_gem_stolen_list_info()
301 seq_puts(m, " "); in i915_gem_stolen_list_info()
302 describe_obj(m, obj); in i915_gem_stolen_list_info()
303 seq_putc(m, '\n'); in i915_gem_stolen_list_info()
308 seq_printf(m, "Total %d objects, %llu bytes, %llu GTT size\n", in i915_gem_stolen_list_info()
384 #define print_file_stats(m, name, stats) do { \ argument
386 …seq_printf(m, "%s: %lu objects, %llu bytes (%llu active, %llu inactive, %llu global, %llu shared, …
397 static void print_batch_pool_stats(struct seq_file *m, in print_batch_pool_stats() argument
416 print_file_stats(m, "[k]batch pool", stats); in print_batch_pool_stats()
430 static int i915_gem_object_info(struct seq_file *m, void* data) in i915_gem_object_info() argument
432 struct drm_info_node *node = m->private; in i915_gem_object_info()
447 seq_printf(m, "%u objects, %zu bytes\n", in i915_gem_object_info()
453 seq_printf(m, "%u [%u] objects, %llu [%llu] bytes in gtt\n", in i915_gem_object_info()
458 seq_printf(m, " %u [%u] active objects, %llu [%llu] bytes\n", in i915_gem_object_info()
463 seq_printf(m, " %u [%u] inactive objects, %llu [%llu] bytes\n", in i915_gem_object_info()
472 seq_printf(m, "%u unbound objects, %llu bytes\n", count, size); in i915_gem_object_info()
489 seq_printf(m, "%u purgeable objects, %llu bytes\n", in i915_gem_object_info()
491 seq_printf(m, "%u pinned mappable objects, %llu bytes\n", in i915_gem_object_info()
493 seq_printf(m, "%u fault mappable objects, %llu bytes\n", in i915_gem_object_info()
496 seq_printf(m, "%llu [%llu] gtt total\n", in i915_gem_object_info()
500 seq_putc(m, '\n'); in i915_gem_object_info()
501 print_batch_pool_stats(m, dev_priv); in i915_gem_object_info()
519 print_file_stats(m, task ? task->comm : "<unknown>", stats); in i915_gem_object_info()
528 static int i915_gem_gtt_info(struct seq_file *m, void *data) in i915_gem_gtt_info() argument
530 struct drm_info_node *node = m->private; in i915_gem_gtt_info()
547 seq_puts(m, " "); in i915_gem_gtt_info()
548 describe_obj(m, obj); in i915_gem_gtt_info()
549 seq_putc(m, '\n'); in i915_gem_gtt_info()
557 seq_printf(m, "Total %d objects, %llu bytes, %llu GTT size\n", in i915_gem_gtt_info()
563 static int i915_gem_pageflip_info(struct seq_file *m, void *data) in i915_gem_pageflip_info() argument
565 struct drm_info_node *node = m->private; in i915_gem_pageflip_info()
583 seq_printf(m, "No flip due on pipe %c (plane %c)\n", in i915_gem_pageflip_info()
589 seq_printf(m, "Flip queued on pipe %c (plane %c)\n", in i915_gem_pageflip_info()
592 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n", in i915_gem_pageflip_info()
599 …seq_printf(m, "Flip queued on %s at seqno %x, next seqno %x [current breadcrumb %x], completed? %d… in i915_gem_pageflip_info()
606 seq_printf(m, "Flip not associated with any ring\n"); in i915_gem_pageflip_info()
607 seq_printf(m, "Flip queued on frame %d, (was ready on frame %d), now %d\n", in i915_gem_pageflip_info()
612 seq_puts(m, "Stall check enabled, "); in i915_gem_pageflip_info()
614 seq_puts(m, "Stall check waiting for page flip ioctl, "); in i915_gem_pageflip_info()
615 seq_printf(m, "%d prepares\n", atomic_read(&work->pending)); in i915_gem_pageflip_info()
621 seq_printf(m, "Current scanout address 0x%08x\n", addr); in i915_gem_pageflip_info()
624 seq_printf(m, "New framebuffer address 0x%08lx\n", (long)work->gtt_offset); in i915_gem_pageflip_info()
625 seq_printf(m, "MMIO update completed? %d\n", addr == work->gtt_offset); in i915_gem_pageflip_info()
636 static int i915_gem_batch_pool_info(struct seq_file *m, void *data) in i915_gem_batch_pool_info() argument
638 struct drm_info_node *node = m->private; in i915_gem_batch_pool_info()
659 seq_printf(m, "%s cache[%d]: %d objects\n", in i915_gem_batch_pool_info()
665 seq_puts(m, " "); in i915_gem_batch_pool_info()
666 describe_obj(m, obj); in i915_gem_batch_pool_info()
667 seq_putc(m, '\n'); in i915_gem_batch_pool_info()
674 seq_printf(m, "total: %d\n", total); in i915_gem_batch_pool_info()
681 static int i915_gem_request_info(struct seq_file *m, void *data) in i915_gem_request_info() argument
683 struct drm_info_node *node = m->private; in i915_gem_request_info()
704 seq_printf(m, "%s requests: %d\n", ring->name, count); in i915_gem_request_info()
712 seq_printf(m, " %x @ %d: %s [%d]\n", in i915_gem_request_info()
725 seq_puts(m, "No requests\n"); in i915_gem_request_info()
730 static void i915_ring_seqno_info(struct seq_file *m, in i915_ring_seqno_info() argument
734 seq_printf(m, "Current sequence (%s): %x\n", in i915_ring_seqno_info()
739 static int i915_gem_seqno_info(struct seq_file *m, void *data) in i915_gem_seqno_info() argument
741 struct drm_info_node *node = m->private; in i915_gem_seqno_info()
753 i915_ring_seqno_info(m, ring); in i915_gem_seqno_info()
762 static int i915_interrupt_info(struct seq_file *m, void *data) in i915_interrupt_info() argument
764 struct drm_info_node *node = m->private; in i915_interrupt_info()
776 seq_printf(m, "Master Interrupt Control:\t%08x\n", in i915_interrupt_info()
779 seq_printf(m, "Display IER:\t%08x\n", in i915_interrupt_info()
781 seq_printf(m, "Display IIR:\t%08x\n", in i915_interrupt_info()
783 seq_printf(m, "Display IIR_RW:\t%08x\n", in i915_interrupt_info()
785 seq_printf(m, "Display IMR:\t%08x\n", in i915_interrupt_info()
788 seq_printf(m, "Pipe %c stat:\t%08x\n", in i915_interrupt_info()
792 seq_printf(m, "Port hotplug:\t%08x\n", in i915_interrupt_info()
794 seq_printf(m, "DPFLIPSTAT:\t%08x\n", in i915_interrupt_info()
796 seq_printf(m, "DPINVGTT:\t%08x\n", in i915_interrupt_info()
800 seq_printf(m, "GT Interrupt IMR %d:\t%08x\n", in i915_interrupt_info()
802 seq_printf(m, "GT Interrupt IIR %d:\t%08x\n", in i915_interrupt_info()
804 seq_printf(m, "GT Interrupt IER %d:\t%08x\n", in i915_interrupt_info()
808 seq_printf(m, "PCU interrupt mask:\t%08x\n", in i915_interrupt_info()
810 seq_printf(m, "PCU interrupt identity:\t%08x\n", in i915_interrupt_info()
812 seq_printf(m, "PCU interrupt enable:\t%08x\n", in i915_interrupt_info()
815 seq_printf(m, "Master Interrupt Control:\t%08x\n", in i915_interrupt_info()
819 seq_printf(m, "GT Interrupt IMR %d:\t%08x\n", in i915_interrupt_info()
821 seq_printf(m, "GT Interrupt IIR %d:\t%08x\n", in i915_interrupt_info()
823 seq_printf(m, "GT Interrupt IER %d:\t%08x\n", in i915_interrupt_info()
830 seq_printf(m, "Pipe %c power disabled\n", in i915_interrupt_info()
834 seq_printf(m, "Pipe %c IMR:\t%08x\n", in i915_interrupt_info()
837 seq_printf(m, "Pipe %c IIR:\t%08x\n", in i915_interrupt_info()
840 seq_printf(m, "Pipe %c IER:\t%08x\n", in i915_interrupt_info()
845 seq_printf(m, "Display Engine port interrupt mask:\t%08x\n", in i915_interrupt_info()
847 seq_printf(m, "Display Engine port interrupt identity:\t%08x\n", in i915_interrupt_info()
849 seq_printf(m, "Display Engine port interrupt enable:\t%08x\n", in i915_interrupt_info()
852 seq_printf(m, "Display Engine misc interrupt mask:\t%08x\n", in i915_interrupt_info()
854 seq_printf(m, "Display Engine misc interrupt identity:\t%08x\n", in i915_interrupt_info()
856 seq_printf(m, "Display Engine misc interrupt enable:\t%08x\n", in i915_interrupt_info()
859 seq_printf(m, "PCU interrupt mask:\t%08x\n", in i915_interrupt_info()
861 seq_printf(m, "PCU interrupt identity:\t%08x\n", in i915_interrupt_info()
863 seq_printf(m, "PCU interrupt enable:\t%08x\n", in i915_interrupt_info()
866 seq_printf(m, "Display IER:\t%08x\n", in i915_interrupt_info()
868 seq_printf(m, "Display IIR:\t%08x\n", in i915_interrupt_info()
870 seq_printf(m, "Display IIR_RW:\t%08x\n", in i915_interrupt_info()
872 seq_printf(m, "Display IMR:\t%08x\n", in i915_interrupt_info()
875 seq_printf(m, "Pipe %c stat:\t%08x\n", in i915_interrupt_info()
879 seq_printf(m, "Master IER:\t%08x\n", in i915_interrupt_info()
882 seq_printf(m, "Render IER:\t%08x\n", in i915_interrupt_info()
884 seq_printf(m, "Render IIR:\t%08x\n", in i915_interrupt_info()
886 seq_printf(m, "Render IMR:\t%08x\n", in i915_interrupt_info()
889 seq_printf(m, "PM IER:\t\t%08x\n", in i915_interrupt_info()
891 seq_printf(m, "PM IIR:\t\t%08x\n", in i915_interrupt_info()
893 seq_printf(m, "PM IMR:\t\t%08x\n", in i915_interrupt_info()
896 seq_printf(m, "Port hotplug:\t%08x\n", in i915_interrupt_info()
898 seq_printf(m, "DPFLIPSTAT:\t%08x\n", in i915_interrupt_info()
900 seq_printf(m, "DPINVGTT:\t%08x\n", in i915_interrupt_info()
904 seq_printf(m, "Interrupt enable: %08x\n", in i915_interrupt_info()
906 seq_printf(m, "Interrupt identity: %08x\n", in i915_interrupt_info()
908 seq_printf(m, "Interrupt mask: %08x\n", in i915_interrupt_info()
911 seq_printf(m, "Pipe %c stat: %08x\n", in i915_interrupt_info()
915 seq_printf(m, "North Display Interrupt enable: %08x\n", in i915_interrupt_info()
917 seq_printf(m, "North Display Interrupt identity: %08x\n", in i915_interrupt_info()
919 seq_printf(m, "North Display Interrupt mask: %08x\n", in i915_interrupt_info()
921 seq_printf(m, "South Display Interrupt enable: %08x\n", in i915_interrupt_info()
923 seq_printf(m, "South Display Interrupt identity: %08x\n", in i915_interrupt_info()
925 seq_printf(m, "South Display Interrupt mask: %08x\n", in i915_interrupt_info()
927 seq_printf(m, "Graphics Interrupt enable: %08x\n", in i915_interrupt_info()
929 seq_printf(m, "Graphics Interrupt identity: %08x\n", in i915_interrupt_info()
931 seq_printf(m, "Graphics Interrupt mask: %08x\n", in i915_interrupt_info()
936 seq_printf(m, in i915_interrupt_info()
940 i915_ring_seqno_info(m, ring); in i915_interrupt_info()
948 static int i915_gem_fence_regs_info(struct seq_file *m, void *data) in i915_gem_fence_regs_info() argument
950 struct drm_info_node *node = m->private; in i915_gem_fence_regs_info()
959 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); in i915_gem_fence_regs_info()
963 seq_printf(m, "Fence %d, pin count = %d, object = ", in i915_gem_fence_regs_info()
966 seq_puts(m, "unused"); in i915_gem_fence_regs_info()
968 describe_obj(m, obj); in i915_gem_fence_regs_info()
969 seq_putc(m, '\n'); in i915_gem_fence_regs_info()
976 static int i915_hws_info(struct seq_file *m, void *data) in i915_hws_info() argument
978 struct drm_info_node *node = m->private; in i915_hws_info()
991 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", in i915_hws_info()
1124 static int i915_frequency_info(struct seq_file *m, void *unused) in i915_frequency_info() argument
1126 struct drm_info_node *node = m->private; in i915_frequency_info()
1139 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); in i915_frequency_info()
1140 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f); in i915_frequency_info()
1141 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> in i915_frequency_info()
1143 seq_printf(m, "Current P-state: %d\n", in i915_frequency_info()
1220 seq_printf(m, "PM IER=0x%08x IMR=0x%08x ISR=0x%08x IIR=0x%08x, MASK=0x%08x\n", in i915_frequency_info()
1222 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); in i915_frequency_info()
1223 seq_printf(m, "Render p-state ratio: %d\n", in i915_frequency_info()
1225 seq_printf(m, "Render p-state VID: %d\n", in i915_frequency_info()
1227 seq_printf(m, "Render p-state limit: %d\n", in i915_frequency_info()
1229 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); in i915_frequency_info()
1230 seq_printf(m, "RPMODECTL: 0x%08x\n", rpmodectl); in i915_frequency_info()
1231 seq_printf(m, "RPINCLIMIT: 0x%08x\n", rpinclimit); in i915_frequency_info()
1232 seq_printf(m, "RPDECLIMIT: 0x%08x\n", rpdeclimit); in i915_frequency_info()
1233 seq_printf(m, "RPNSWREQ: %dMHz\n", reqf); in i915_frequency_info()
1234 seq_printf(m, "CAGF: %dMHz\n", cagf); in i915_frequency_info()
1235 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei & in i915_frequency_info()
1237 seq_printf(m, "RP CUR UP: %dus\n", rpcurup & in i915_frequency_info()
1239 seq_printf(m, "RP PREV UP: %dus\n", rpprevup & in i915_frequency_info()
1241 seq_printf(m, "Up threshold: %d%%\n", in i915_frequency_info()
1244 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei & in i915_frequency_info()
1246 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown & in i915_frequency_info()
1248 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown & in i915_frequency_info()
1250 seq_printf(m, "Down threshold: %d%%\n", in i915_frequency_info()
1256 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n", in i915_frequency_info()
1261 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n", in i915_frequency_info()
1267 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", in i915_frequency_info()
1269 seq_printf(m, "Max overclocked frequency: %dMHz\n", in i915_frequency_info()
1272 seq_printf(m, "Current freq: %d MHz\n", in i915_frequency_info()
1274 seq_printf(m, "Actual freq: %d MHz\n", cagf); in i915_frequency_info()
1275 seq_printf(m, "Idle freq: %d MHz\n", in i915_frequency_info()
1277 seq_printf(m, "Min freq: %d MHz\n", in i915_frequency_info()
1279 seq_printf(m, "Max freq: %d MHz\n", in i915_frequency_info()
1281 seq_printf(m, in i915_frequency_info()
1289 seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts); in i915_frequency_info()
1290 seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq); in i915_frequency_info()
1292 seq_printf(m, "actual GPU freq: %d MHz\n", in i915_frequency_info()
1295 seq_printf(m, "current GPU freq: %d MHz\n", in i915_frequency_info()
1298 seq_printf(m, "max GPU freq: %d MHz\n", in i915_frequency_info()
1301 seq_printf(m, "min GPU freq: %d MHz\n", in i915_frequency_info()
1304 seq_printf(m, "idle GPU freq: %d MHz\n", in i915_frequency_info()
1307 seq_printf(m, in i915_frequency_info()
1312 seq_puts(m, "no P-state info available\n"); in i915_frequency_info()
1315 seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk_freq); in i915_frequency_info()
1316 seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq); in i915_frequency_info()
1317 seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq); in i915_frequency_info()
1324 static int i915_hangcheck_info(struct seq_file *m, void *unused) in i915_hangcheck_info() argument
1326 struct drm_info_node *node = m->private; in i915_hangcheck_info()
1335 seq_printf(m, "Hangcheck disabled\n"); in i915_hangcheck_info()
1349 seq_printf(m, "Hangcheck active, fires in %dms\n", in i915_hangcheck_info()
1353 seq_printf(m, "Hangcheck inactive\n"); in i915_hangcheck_info()
1356 seq_printf(m, "%s:\n", ring->name); in i915_hangcheck_info()
1357 seq_printf(m, "\tseqno = %x [current %x]\n", in i915_hangcheck_info()
1359 seq_printf(m, "\tACTHD = 0x%08llx [current 0x%08llx]\n", in i915_hangcheck_info()
1362 seq_printf(m, "\tmax ACTHD = 0x%08llx\n", in i915_hangcheck_info()
1364 seq_printf(m, "\tscore = %d\n", ring->hangcheck.score); in i915_hangcheck_info()
1365 seq_printf(m, "\taction = %d\n", ring->hangcheck.action); in i915_hangcheck_info()
1371 static int ironlake_drpc_info(struct seq_file *m) in ironlake_drpc_info() argument
1373 struct drm_info_node *node = m->private; in ironlake_drpc_info()
1392 seq_printf(m, "HD boost: %s\n", yesno(rgvmodectl & MEMMODE_BOOST_EN)); in ironlake_drpc_info()
1393 seq_printf(m, "Boost freq: %d\n", in ironlake_drpc_info()
1396 seq_printf(m, "HW control enabled: %s\n", in ironlake_drpc_info()
1398 seq_printf(m, "SW control enabled: %s\n", in ironlake_drpc_info()
1400 seq_printf(m, "Gated voltage change: %s\n", in ironlake_drpc_info()
1402 seq_printf(m, "Starting frequency: P%d\n", in ironlake_drpc_info()
1404 seq_printf(m, "Max P-state: P%d\n", in ironlake_drpc_info()
1406 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); in ironlake_drpc_info()
1407 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f)); in ironlake_drpc_info()
1408 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f)); in ironlake_drpc_info()
1409 seq_printf(m, "Render standby enabled: %s\n", in ironlake_drpc_info()
1411 seq_puts(m, "Current RS state: "); in ironlake_drpc_info()
1414 seq_puts(m, "on\n"); in ironlake_drpc_info()
1417 seq_puts(m, "RC1\n"); in ironlake_drpc_info()
1420 seq_puts(m, "RC1E\n"); in ironlake_drpc_info()
1423 seq_puts(m, "RS1\n"); in ironlake_drpc_info()
1426 seq_puts(m, "RS2 (RC6)\n"); in ironlake_drpc_info()
1429 seq_puts(m, "RC3 (RC6+)\n"); in ironlake_drpc_info()
1432 seq_puts(m, "unknown\n"); in ironlake_drpc_info()
1439 static int i915_forcewake_domains(struct seq_file *m, void *data) in i915_forcewake_domains() argument
1441 struct drm_info_node *node = m->private; in i915_forcewake_domains()
1449 seq_printf(m, "%s.wake_count = %u\n", in i915_forcewake_domains()
1458 static int vlv_drpc_info(struct seq_file *m) in vlv_drpc_info() argument
1460 struct drm_info_node *node = m->private; in vlv_drpc_info()
1473 seq_printf(m, "Video Turbo Mode: %s\n", in vlv_drpc_info()
1475 seq_printf(m, "Turbo enabled: %s\n", in vlv_drpc_info()
1477 seq_printf(m, "HW control enabled: %s\n", in vlv_drpc_info()
1479 seq_printf(m, "SW control enabled: %s\n", in vlv_drpc_info()
1482 seq_printf(m, "RC6 Enabled: %s\n", in vlv_drpc_info()
1485 seq_printf(m, "Render Power Well: %s\n", in vlv_drpc_info()
1487 seq_printf(m, "Media Power Well: %s\n", in vlv_drpc_info()
1490 seq_printf(m, "Render RC6 residency since boot: %u\n", in vlv_drpc_info()
1492 seq_printf(m, "Media RC6 residency since boot: %u\n", in vlv_drpc_info()
1495 return i915_forcewake_domains(m, NULL); in vlv_drpc_info()
1498 static int gen6_drpc_info(struct seq_file *m) in gen6_drpc_info() argument
1500 struct drm_info_node *node = m->private; in gen6_drpc_info()
1517 seq_puts(m, "RC information inaccurate because somebody " in gen6_drpc_info()
1523 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51)); in gen6_drpc_info()
1538 seq_printf(m, "Video Turbo Mode: %s\n", in gen6_drpc_info()
1540 seq_printf(m, "HW control enabled: %s\n", in gen6_drpc_info()
1542 seq_printf(m, "SW control enabled: %s\n", in gen6_drpc_info()
1545 seq_printf(m, "RC1e Enabled: %s\n", in gen6_drpc_info()
1547 seq_printf(m, "RC6 Enabled: %s\n", in gen6_drpc_info()
1549 seq_printf(m, "Deep RC6 Enabled: %s\n", in gen6_drpc_info()
1551 seq_printf(m, "Deepest RC6 Enabled: %s\n", in gen6_drpc_info()
1553 seq_puts(m, "Current RC state: "); in gen6_drpc_info()
1557 seq_puts(m, "Core Power Down\n"); in gen6_drpc_info()
1559 seq_puts(m, "on\n"); in gen6_drpc_info()
1562 seq_puts(m, "RC3\n"); in gen6_drpc_info()
1565 seq_puts(m, "RC6\n"); in gen6_drpc_info()
1568 seq_puts(m, "RC7\n"); in gen6_drpc_info()
1571 seq_puts(m, "Unknown\n"); in gen6_drpc_info()
1575 seq_printf(m, "Core Power Down: %s\n", in gen6_drpc_info()
1579 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n", in gen6_drpc_info()
1581 seq_printf(m, "RC6 residency since boot: %u\n", in gen6_drpc_info()
1583 seq_printf(m, "RC6+ residency since boot: %u\n", in gen6_drpc_info()
1585 seq_printf(m, "RC6++ residency since boot: %u\n", in gen6_drpc_info()
1588 seq_printf(m, "RC6 voltage: %dmV\n", in gen6_drpc_info()
1590 seq_printf(m, "RC6+ voltage: %dmV\n", in gen6_drpc_info()
1592 seq_printf(m, "RC6++ voltage: %dmV\n", in gen6_drpc_info()
1597 static int i915_drpc_info(struct seq_file *m, void *unused) in i915_drpc_info() argument
1599 struct drm_info_node *node = m->private; in i915_drpc_info()
1603 return vlv_drpc_info(m); in i915_drpc_info()
1605 return gen6_drpc_info(m); in i915_drpc_info()
1607 return ironlake_drpc_info(m); in i915_drpc_info()
1610 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused) in i915_frontbuffer_tracking() argument
1612 struct drm_info_node *node = m->private; in i915_frontbuffer_tracking()
1616 seq_printf(m, "FB tracking busy bits: 0x%08x\n", in i915_frontbuffer_tracking()
1619 seq_printf(m, "FB tracking flip bits: 0x%08x\n", in i915_frontbuffer_tracking()
1625 static int i915_fbc_status(struct seq_file *m, void *unused) in i915_fbc_status() argument
1627 struct drm_info_node *node = m->private; in i915_fbc_status()
1632 seq_puts(m, "FBC unsupported on this chipset\n"); in i915_fbc_status()
1640 seq_puts(m, "FBC enabled\n"); in i915_fbc_status()
1642 seq_printf(m, "FBC disabled: %s\n", in i915_fbc_status()
1646 seq_printf(m, "Compressing: %s\n", in i915_fbc_status()
1695 static int i915_ips_status(struct seq_file *m, void *unused) in i915_ips_status() argument
1697 struct drm_info_node *node = m->private; in i915_ips_status()
1702 seq_puts(m, "not supported\n"); in i915_ips_status()
1708 seq_printf(m, "Enabled by kernel parameter: %s\n", in i915_ips_status()
1712 seq_puts(m, "Currently: unknown\n"); in i915_ips_status()
1715 seq_puts(m, "Currently: enabled\n"); in i915_ips_status()
1717 seq_puts(m, "Currently: disabled\n"); in i915_ips_status()
1725 static int i915_sr_status(struct seq_file *m, void *unused) in i915_sr_status() argument
1727 struct drm_info_node *node = m->private; in i915_sr_status()
1748 seq_printf(m, "self-refresh: %s\n", in i915_sr_status()
1754 static int i915_emon_status(struct seq_file *m, void *unused) in i915_emon_status() argument
1756 struct drm_info_node *node = m->private; in i915_emon_status()
1774 seq_printf(m, "GMCH temp: %ld\n", temp); in i915_emon_status()
1775 seq_printf(m, "Chipset power: %ld\n", chipset); in i915_emon_status()
1776 seq_printf(m, "GFX power: %ld\n", gfx); in i915_emon_status()
1777 seq_printf(m, "Total power: %ld\n", chipset + gfx); in i915_emon_status()
1782 static int i915_ring_freq_table(struct seq_file *m, void *unused) in i915_ring_freq_table() argument
1784 struct drm_info_node *node = m->private; in i915_ring_freq_table()
1792 seq_puts(m, "unsupported on this chipset\n"); in i915_ring_freq_table()
1815 seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n"); in i915_ring_freq_table()
1822 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n", in i915_ring_freq_table()
1836 static int i915_opregion(struct seq_file *m, void *unused) in i915_opregion() argument
1838 struct drm_info_node *node = m->private; in i915_opregion()
1854 seq_write(m, data, OPREGION_SIZE); in i915_opregion()
1864 static int i915_gem_framebuffer_info(struct seq_file *m, void *data) in i915_gem_framebuffer_info() argument
1866 struct drm_info_node *node = m->private; in i915_gem_framebuffer_info()
1878 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", in i915_gem_framebuffer_info()
1885 describe_obj(m, fb->obj); in i915_gem_framebuffer_info()
1886 seq_putc(m, '\n'); in i915_gem_framebuffer_info()
1895 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ", in i915_gem_framebuffer_info()
1902 describe_obj(m, fb->obj); in i915_gem_framebuffer_info()
1903 seq_putc(m, '\n'); in i915_gem_framebuffer_info()
1910 static void describe_ctx_ringbuf(struct seq_file *m, in describe_ctx_ringbuf() argument
1913 seq_printf(m, " (ringbuffer, space: %d, head: %u, tail: %u, last head: %d)", in describe_ctx_ringbuf()
1918 static int i915_context_status(struct seq_file *m, void *unused) in i915_context_status() argument
1920 struct drm_info_node *node = m->private; in i915_context_status()
1936 seq_puts(m, "HW context "); in i915_context_status()
1937 describe_ctx(m, ctx); in i915_context_status()
1940 seq_printf(m, "(default context %s) ", in i915_context_status()
1945 seq_putc(m, '\n'); in i915_context_status()
1952 seq_printf(m, "%s: ", ring->name); in i915_context_status()
1954 describe_obj(m, ctx_obj); in i915_context_status()
1956 describe_ctx_ringbuf(m, ringbuf); in i915_context_status()
1957 seq_putc(m, '\n'); in i915_context_status()
1960 describe_obj(m, ctx->legacy_hw_ctx.rcs_state); in i915_context_status()
1963 seq_putc(m, '\n'); in i915_context_status()
1971 static void i915_dump_lrc_obj(struct seq_file *m, in i915_dump_lrc_obj() argument
1981 seq_printf(m, "Context on %s with no gem object\n", in i915_dump_lrc_obj()
1986 seq_printf(m, "CONTEXT: %s %u\n", ring->name, in i915_dump_lrc_obj()
1990 seq_puts(m, "\tNot bound in GGTT\n"); in i915_dump_lrc_obj()
1995 seq_puts(m, "\tFailed to get pages for context object\n"); in i915_dump_lrc_obj()
2004 seq_printf(m, "\t[0x%08lx] 0x%08x 0x%08x 0x%08x 0x%08x\n", in i915_dump_lrc_obj()
2012 seq_putc(m, '\n'); in i915_dump_lrc_obj()
2015 static int i915_dump_lrc(struct seq_file *m, void *unused) in i915_dump_lrc() argument
2017 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_dump_lrc()
2025 seq_printf(m, "Logical Ring Contexts are disabled\n"); in i915_dump_lrc()
2036 i915_dump_lrc_obj(m, ring, in i915_dump_lrc()
2046 static int i915_execlists(struct seq_file *m, void *data) in i915_execlists() argument
2048 struct drm_info_node *node = (struct drm_info_node *)m->private; in i915_execlists()
2062 seq_puts(m, "Logical Ring Contexts are disabled\n"); in i915_execlists()
2077 seq_printf(m, "%s\n", ring->name); in i915_execlists()
2081 seq_printf(m, "\tExeclist status: 0x%08X, context: %u\n", in i915_execlists()
2085 seq_printf(m, "\tStatus pointer: 0x%08X\n", status_pointer); in i915_execlists()
2091 seq_printf(m, "\tRead pointer: 0x%08X, write pointer 0x%08X\n", in i915_execlists()
2098 seq_printf(m, "\tStatus buffer %d: 0x%08X, context: %u\n", in i915_execlists()
2109 seq_printf(m, "\t%d requests in queue\n", count); in i915_execlists()
2114 seq_printf(m, "\tHead request id: %u\n", in i915_execlists()
2116 seq_printf(m, "\tHead request tail: %u\n", in i915_execlists()
2120 seq_putc(m, '\n'); in i915_execlists()
2153 static int i915_swizzle_info(struct seq_file *m, void *data) in i915_swizzle_info() argument
2155 struct drm_info_node *node = m->private; in i915_swizzle_info()
2165 seq_printf(m, "bit6 swizzle for X-tiling = %s\n", in i915_swizzle_info()
2167 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n", in i915_swizzle_info()
2171 seq_printf(m, "DDC = 0x%08x\n", in i915_swizzle_info()
2173 seq_printf(m, "DDC2 = 0x%08x\n", in i915_swizzle_info()
2175 seq_printf(m, "C0DRB3 = 0x%04x\n", in i915_swizzle_info()
2177 seq_printf(m, "C1DRB3 = 0x%04x\n", in i915_swizzle_info()
2180 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", in i915_swizzle_info()
2182 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", in i915_swizzle_info()
2184 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n", in i915_swizzle_info()
2186 seq_printf(m, "TILECTL = 0x%08x\n", in i915_swizzle_info()
2189 seq_printf(m, "GAMTARBMODE = 0x%08x\n", in i915_swizzle_info()
2192 seq_printf(m, "ARB_MODE = 0x%08x\n", in i915_swizzle_info()
2194 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n", in i915_swizzle_info()
2199 seq_puts(m, "L-shaped memory detected\n"); in i915_swizzle_info()
2210 struct seq_file *m = data; in per_file_ctx() local
2214 seq_printf(m, " no ppgtt for context %d\n", in per_file_ctx()
2220 seq_puts(m, " default context:\n"); in per_file_ctx()
2222 seq_printf(m, " context %d:\n", ctx->user_handle); in per_file_ctx()
2223 ppgtt->debug_dump(ppgtt, m); in per_file_ctx()
2228 static void gen8_ppgtt_info(struct seq_file *m, struct drm_device *dev) in gen8_ppgtt_info() argument
2239 seq_printf(m, "%s\n", ring->name); in gen8_ppgtt_info()
2244 seq_printf(m, "\tPDP%d 0x%016llx\n", i, pdp); in gen8_ppgtt_info()
2249 static void gen6_ppgtt_info(struct seq_file *m, struct drm_device *dev) in gen6_ppgtt_info() argument
2256 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE)); in gen6_ppgtt_info()
2259 seq_printf(m, "%s\n", ring->name); in gen6_ppgtt_info()
2261 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring))); in gen6_ppgtt_info()
2262 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring))); in gen6_ppgtt_info()
2263 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring))); in gen6_ppgtt_info()
2264 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring))); in gen6_ppgtt_info()
2269 seq_puts(m, "aliasing PPGTT:\n"); in gen6_ppgtt_info()
2270 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd.base.ggtt_offset); in gen6_ppgtt_info()
2272 ppgtt->debug_dump(ppgtt, m); in gen6_ppgtt_info()
2275 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK)); in gen6_ppgtt_info()
2278 static int i915_ppgtt_info(struct seq_file *m, void *data) in i915_ppgtt_info() argument
2280 struct drm_info_node *node = m->private; in i915_ppgtt_info()
2291 gen8_ppgtt_info(m, dev); in i915_ppgtt_info()
2293 gen6_ppgtt_info(m, dev); in i915_ppgtt_info()
2304 seq_printf(m, "\nproc: %s\n", task->comm); in i915_ppgtt_info()
2307 (void *)(unsigned long)m); in i915_ppgtt_info()
2329 static int i915_rps_boost_info(struct seq_file *m, void *data) in i915_rps_boost_info() argument
2331 struct drm_info_node *node = m->private; in i915_rps_boost_info()
2336 seq_printf(m, "RPS enabled? %d\n", dev_priv->rps.enabled); in i915_rps_boost_info()
2337 seq_printf(m, "GPU busy? %d\n", dev_priv->mm.busy); in i915_rps_boost_info()
2338 seq_printf(m, "CPU waiting? %d\n", count_irq_waiters(dev_priv)); in i915_rps_boost_info()
2339 seq_printf(m, "Frequency requested %d; min hard:%d, soft:%d; max soft:%d, hard:%d\n", in i915_rps_boost_info()
2352 seq_printf(m, "%s [%d]: %d boosts%s\n", in i915_rps_boost_info()
2359 seq_printf(m, "Semaphore boosts: %d%s\n", in i915_rps_boost_info()
2362 seq_printf(m, "MMIO flip boosts: %d%s\n", in i915_rps_boost_info()
2365 seq_printf(m, "Kernel boosts: %d\n", dev_priv->rps.boosts); in i915_rps_boost_info()
2371 static int i915_llc(struct seq_file *m, void *data) in i915_llc() argument
2373 struct drm_info_node *node = m->private; in i915_llc()
2378 seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev))); in i915_llc()
2379 seq_printf(m, "eLLC: %zuMB\n", dev_priv->ellc_size); in i915_llc()
2384 static int i915_guc_load_status_info(struct seq_file *m, void *data) in i915_guc_load_status_info() argument
2386 struct drm_info_node *node = m->private; in i915_guc_load_status_info()
2394 seq_printf(m, "GuC firmware status:\n"); in i915_guc_load_status_info()
2395 seq_printf(m, "\tpath: %s\n", in i915_guc_load_status_info()
2397 seq_printf(m, "\tfetch: %s\n", in i915_guc_load_status_info()
2399 seq_printf(m, "\tload: %s\n", in i915_guc_load_status_info()
2401 seq_printf(m, "\tversion wanted: %d.%d\n", in i915_guc_load_status_info()
2403 seq_printf(m, "\tversion found: %d.%d\n", in i915_guc_load_status_info()
2408 seq_printf(m, "\nGuC status 0x%08x:\n", tmp); in i915_guc_load_status_info()
2409 seq_printf(m, "\tBootrom status = 0x%x\n", in i915_guc_load_status_info()
2411 seq_printf(m, "\tuKernel status = 0x%x\n", in i915_guc_load_status_info()
2413 seq_printf(m, "\tMIA Core status = 0x%x\n", in i915_guc_load_status_info()
2415 seq_puts(m, "\nScratch registers:\n"); in i915_guc_load_status_info()
2417 seq_printf(m, "\t%2d: \t0x%x\n", i, I915_READ(SOFT_SCRATCH(i))); in i915_guc_load_status_info()
2422 static void i915_guc_client_info(struct seq_file *m, in i915_guc_client_info() argument
2430 seq_printf(m, "\tPriority %d, GuC ctx index: %u, PD offset 0x%x\n", in i915_guc_client_info()
2432 seq_printf(m, "\tDoorbell id %d, offset: 0x%x, cookie 0x%x\n", in i915_guc_client_info()
2434 seq_printf(m, "\tWQ size %d, offset: 0x%x, tail %d\n", in i915_guc_client_info()
2437 seq_printf(m, "\tFailed to queue: %u\n", client->q_fail); in i915_guc_client_info()
2438 seq_printf(m, "\tFailed doorbell: %u\n", client->b_fail); in i915_guc_client_info()
2439 seq_printf(m, "\tLast submission result: %d\n", client->retcode); in i915_guc_client_info()
2442 seq_printf(m, "\tSubmissions: %llu %s\n", in i915_guc_client_info()
2447 seq_printf(m, "\tTotal: %llu\n", tot); in i915_guc_client_info()
2450 static int i915_guc_info(struct seq_file *m, void *data) in i915_guc_info() argument
2452 struct drm_info_node *node = m->private; in i915_guc_info()
2474 seq_printf(m, "GuC total action count: %llu\n", guc.action_count); in i915_guc_info()
2475 seq_printf(m, "GuC action failure count: %u\n", guc.action_fail); in i915_guc_info()
2476 seq_printf(m, "GuC last action command: 0x%x\n", guc.action_cmd); in i915_guc_info()
2477 seq_printf(m, "GuC last action status: 0x%x\n", guc.action_status); in i915_guc_info()
2478 seq_printf(m, "GuC last action error code: %d\n", guc.action_err); in i915_guc_info()
2480 seq_printf(m, "\nGuC submissions:\n"); in i915_guc_info()
2482 seq_printf(m, "\t%-24s: %10llu, last seqno 0x%08x %9d\n", in i915_guc_info()
2487 seq_printf(m, "\t%s: %llu\n", "Total", total); in i915_guc_info()
2489 seq_printf(m, "\nGuC execbuf client @ %p:\n", guc.execbuf_client); in i915_guc_info()
2490 i915_guc_client_info(m, dev_priv, &client); in i915_guc_info()
2497 static int i915_guc_log_dump(struct seq_file *m, void *data) in i915_guc_log_dump() argument
2499 struct drm_info_node *node = m->private; in i915_guc_log_dump()
2513 seq_printf(m, "0x%08x 0x%08x 0x%08x 0x%08x\n", in i915_guc_log_dump()
2520 seq_putc(m, '\n'); in i915_guc_log_dump()
2525 static int i915_edp_psr_status(struct seq_file *m, void *data) in i915_edp_psr_status() argument
2527 struct drm_info_node *node = m->private; in i915_edp_psr_status()
2536 seq_puts(m, "PSR not supported\n"); in i915_edp_psr_status()
2543 seq_printf(m, "Sink_Support: %s\n", yesno(dev_priv->psr.sink_support)); in i915_edp_psr_status()
2544 seq_printf(m, "Source_OK: %s\n", yesno(dev_priv->psr.source_ok)); in i915_edp_psr_status()
2545 seq_printf(m, "Enabled: %s\n", yesno((bool)dev_priv->psr.enabled)); in i915_edp_psr_status()
2546 seq_printf(m, "Active: %s\n", yesno(dev_priv->psr.active)); in i915_edp_psr_status()
2547 seq_printf(m, "Busy frontbuffer bits: 0x%03x\n", in i915_edp_psr_status()
2549 seq_printf(m, "Re-enable work scheduled: %s\n", in i915_edp_psr_status()
2563 seq_printf(m, "HW Enabled & Active bit: %s", yesno(enabled)); in i915_edp_psr_status()
2569 seq_printf(m, " pipe %c", pipe_name(pipe)); in i915_edp_psr_status()
2571 seq_puts(m, "\n"); in i915_edp_psr_status()
2578 seq_printf(m, "Performance_Counter: %u\n", psrperf); in i915_edp_psr_status()
2586 static int i915_sink_crc(struct seq_file *m, void *data) in i915_sink_crc() argument
2588 struct drm_info_node *node = m->private; in i915_sink_crc()
2615 seq_printf(m, "%02x%02x%02x%02x%02x%02x\n", in i915_sink_crc()
2626 static int i915_energy_uJ(struct seq_file *m, void *data) in i915_energy_uJ() argument
2628 struct drm_info_node *node = m->private; in i915_energy_uJ()
2647 seq_printf(m, "%llu", (long long unsigned)power); in i915_energy_uJ()
2652 static int i915_runtime_pm_status(struct seq_file *m, void *unused) in i915_runtime_pm_status() argument
2654 struct drm_info_node *node = m->private; in i915_runtime_pm_status()
2659 seq_puts(m, "not supported\n"); in i915_runtime_pm_status()
2663 seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy)); in i915_runtime_pm_status()
2664 seq_printf(m, "IRQs disabled: %s\n", in i915_runtime_pm_status()
2667 seq_printf(m, "Usage count: %d\n", in i915_runtime_pm_status()
2670 seq_printf(m, "Device Power Management (CONFIG_PM) disabled\n"); in i915_runtime_pm_status()
2747 static int i915_power_domain_info(struct seq_file *m, void *unused) in i915_power_domain_info() argument
2749 struct drm_info_node *node = m->private; in i915_power_domain_info()
2757 seq_printf(m, "%-25s %s\n", "Power well/domain", "Use count"); in i915_power_domain_info()
2763 seq_printf(m, "%-25s %d\n", power_well->name, in i915_power_domain_info()
2771 seq_printf(m, " %-23s %d\n", in i915_power_domain_info()
2782 static void intel_seq_print_mode(struct seq_file *m, int tabs, in intel_seq_print_mode() argument
2788 seq_putc(m, '\t'); in intel_seq_print_mode()
2790 …seq_printf(m, "id %d:\"%s\" freq %d clock %d hdisp %d hss %d hse %d htot %d vdisp %d vss %d vse %d… in intel_seq_print_mode()
2800 static void intel_encoder_info(struct seq_file *m, in intel_encoder_info() argument
2804 struct drm_info_node *node = m->private; in intel_encoder_info()
2811 seq_printf(m, "\tencoder %d: type: %s, connectors:\n", in intel_encoder_info()
2815 seq_printf(m, "\t\tconnector %d: type: %s, status: %s", in intel_encoder_info()
2821 seq_printf(m, ", mode:\n"); in intel_encoder_info()
2822 intel_seq_print_mode(m, 2, mode); in intel_encoder_info()
2824 seq_putc(m, '\n'); in intel_encoder_info()
2829 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_crtc_info() argument
2831 struct drm_info_node *node = m->private; in intel_crtc_info()
2839 seq_printf(m, "\tfb: %d, pos: %dx%d, size: %dx%d\n", in intel_crtc_info()
2843 seq_puts(m, "\tprimary plane disabled\n"); in intel_crtc_info()
2845 intel_encoder_info(m, intel_crtc, intel_encoder); in intel_crtc_info()
2848 static void intel_panel_info(struct seq_file *m, struct intel_panel *panel) in intel_panel_info() argument
2852 seq_printf(m, "\tfixed mode:\n"); in intel_panel_info()
2853 intel_seq_print_mode(m, 2, mode); in intel_panel_info()
2856 static void intel_dp_info(struct seq_file *m, in intel_dp_info() argument
2862 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]); in intel_dp_info()
2863 seq_printf(m, "\taudio support: %s\n", yesno(intel_dp->has_audio)); in intel_dp_info()
2865 intel_panel_info(m, &intel_connector->panel); in intel_dp_info()
2868 static void intel_hdmi_info(struct seq_file *m, in intel_hdmi_info() argument
2874 seq_printf(m, "\taudio support: %s\n", yesno(intel_hdmi->has_audio)); in intel_hdmi_info()
2877 static void intel_lvds_info(struct seq_file *m, in intel_lvds_info() argument
2880 intel_panel_info(m, &intel_connector->panel); in intel_lvds_info()
2883 static void intel_connector_info(struct seq_file *m, in intel_connector_info() argument
2890 seq_printf(m, "connector %d: type %s, status: %s\n", in intel_connector_info()
2894 seq_printf(m, "\tname: %s\n", connector->display_info.name); in intel_connector_info()
2895 seq_printf(m, "\tphysical dimensions: %dx%dmm\n", in intel_connector_info()
2898 seq_printf(m, "\tsubpixel order: %s\n", in intel_connector_info()
2900 seq_printf(m, "\tCEA rev: %d\n", in intel_connector_info()
2906 intel_dp_info(m, intel_connector); in intel_connector_info()
2908 intel_hdmi_info(m, intel_connector); in intel_connector_info()
2910 intel_lvds_info(m, intel_connector); in intel_connector_info()
2913 seq_printf(m, "\tmodes:\n"); in intel_connector_info()
2915 intel_seq_print_mode(m, 2, mode); in intel_connector_info()
2949 static int i915_display_info(struct seq_file *m, void *unused) in i915_display_info() argument
2951 struct drm_info_node *node = m->private; in i915_display_info()
2959 seq_printf(m, "CRTC info\n"); in i915_display_info()
2960 seq_printf(m, "---------\n"); in i915_display_info()
2968 seq_printf(m, "CRTC %d: pipe: %c, active=%s (size=%dx%d)\n", in i915_display_info()
2973 intel_crtc_info(m, crtc); in i915_display_info()
2976 seq_printf(m, "\tcursor visible? %s, position (%d, %d), size %dx%d, addr 0x%08x, active? %s\n", in i915_display_info()
2983 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s \n", in i915_display_info()
2988 seq_printf(m, "\n"); in i915_display_info()
2989 seq_printf(m, "Connector info\n"); in i915_display_info()
2990 seq_printf(m, "--------------\n"); in i915_display_info()
2992 intel_connector_info(m, connector); in i915_display_info()
3000 static int i915_semaphore_status(struct seq_file *m, void *unused) in i915_semaphore_status() argument
3002 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_semaphore_status()
3010 seq_puts(m, "Semaphores are disabled\n"); in i915_semaphore_status()
3029 seq_printf(m, "%s\n", ring->name); in i915_semaphore_status()
3031 seq_puts(m, " Last signal:"); in i915_semaphore_status()
3034 seq_printf(m, "0x%08llx (0x%02llx) ", in i915_semaphore_status()
3037 seq_putc(m, '\n'); in i915_semaphore_status()
3039 seq_puts(m, " Last wait: "); in i915_semaphore_status()
3042 seq_printf(m, "0x%08llx (0x%02llx) ", in i915_semaphore_status()
3045 seq_putc(m, '\n'); in i915_semaphore_status()
3050 seq_puts(m, " Last signal:"); in i915_semaphore_status()
3053 seq_printf(m, "0x%08x\n", in i915_semaphore_status()
3055 seq_putc(m, '\n'); in i915_semaphore_status()
3058 seq_puts(m, "\nSync seqno:\n"); in i915_semaphore_status()
3061 seq_printf(m, " 0x%08x ", ring->semaphore.sync_seqno[j]); in i915_semaphore_status()
3063 seq_putc(m, '\n'); in i915_semaphore_status()
3065 seq_putc(m, '\n'); in i915_semaphore_status()
3072 static int i915_shared_dplls_info(struct seq_file *m, void *unused) in i915_shared_dplls_info() argument
3074 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_shared_dplls_info()
3083 seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id); in i915_shared_dplls_info()
3084 seq_printf(m, " crtc_mask: 0x%08x, active: %d, on: %s\n", in i915_shared_dplls_info()
3086 seq_printf(m, " tracked hardware state:\n"); in i915_shared_dplls_info()
3087 seq_printf(m, " dpll: 0x%08x\n", pll->config.hw_state.dpll); in i915_shared_dplls_info()
3088 seq_printf(m, " dpll_md: 0x%08x\n", in i915_shared_dplls_info()
3090 seq_printf(m, " fp0: 0x%08x\n", pll->config.hw_state.fp0); in i915_shared_dplls_info()
3091 seq_printf(m, " fp1: 0x%08x\n", pll->config.hw_state.fp1); in i915_shared_dplls_info()
3092 seq_printf(m, " wrpll: 0x%08x\n", pll->config.hw_state.wrpll); in i915_shared_dplls_info()
3099 static int i915_wa_registers(struct seq_file *m, void *unused) in i915_wa_registers() argument
3103 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_wa_registers()
3113 seq_printf(m, "Workarounds applied: %d\n", dev_priv->workarounds.count); in i915_wa_registers()
3123 seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X, read: 0x%08x, status: %s\n", in i915_wa_registers()
3133 static int i915_ddb_info(struct seq_file *m, void *unused) in i915_ddb_info() argument
3135 struct drm_info_node *node = m->private; in i915_ddb_info()
3150 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size"); in i915_ddb_info()
3153 seq_printf(m, "Pipe %c\n", pipe_name(pipe)); in i915_ddb_info()
3157 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane + 1, in i915_ddb_info()
3163 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start, in i915_ddb_info()
3172 static void drrs_status_per_crtc(struct seq_file *m, in drrs_status_per_crtc() argument
3184 seq_puts(m, "eDP:\n"); in drrs_status_per_crtc()
3187 seq_puts(m, "DSI:\n"); in drrs_status_per_crtc()
3190 seq_puts(m, "HDMI:\n"); in drrs_status_per_crtc()
3193 seq_puts(m, "DP:\n"); in drrs_status_per_crtc()
3196 seq_printf(m, "Other encoder (id=%d).\n", in drrs_status_per_crtc()
3203 seq_puts(m, "\tVBT: DRRS_type: Static"); in drrs_status_per_crtc()
3205 seq_puts(m, "\tVBT: DRRS_type: Seamless"); in drrs_status_per_crtc()
3207 seq_puts(m, "\tVBT: DRRS_type: None"); in drrs_status_per_crtc()
3209 seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value"); in drrs_status_per_crtc()
3211 seq_puts(m, "\n\n"); in drrs_status_per_crtc()
3218 seq_puts(m, "\tDRRS Supported: Yes\n"); in drrs_status_per_crtc()
3222 seq_puts(m, "Idleness DRRS: Disabled"); in drrs_status_per_crtc()
3228 seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X", in drrs_status_per_crtc()
3231 seq_puts(m, "\n\t\t"); in drrs_status_per_crtc()
3233 seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n"); in drrs_status_per_crtc()
3236 seq_puts(m, "DRRS_State: DRRS_LOW_RR\n"); in drrs_status_per_crtc()
3239 seq_printf(m, "DRRS_State: Unknown(%d)\n", in drrs_status_per_crtc()
3244 seq_printf(m, "\t\tVrefresh: %d", vrefresh); in drrs_status_per_crtc()
3246 seq_puts(m, "\n\t\t"); in drrs_status_per_crtc()
3250 seq_puts(m, "\tDRRS Supported : No"); in drrs_status_per_crtc()
3252 seq_puts(m, "\n"); in drrs_status_per_crtc()
3255 static int i915_drrs_status(struct seq_file *m, void *unused) in i915_drrs_status() argument
3257 struct drm_info_node *node = m->private; in i915_drrs_status()
3267 seq_printf(m, "\nCRTC %d: ", active_crtc_cnt); in i915_drrs_status()
3269 drrs_status_per_crtc(m, dev, intel_crtc); in i915_drrs_status()
3276 seq_puts(m, "No active crtc found\n"); in i915_drrs_status()
3287 static int i915_dp_mst_info(struct seq_file *m, void *unused) in i915_dp_mst_info() argument
3289 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_dp_mst_info()
3303 drm_dp_mst_dump_topology(m, &intel_dig_port->dp.mst_mgr); in i915_dp_mst_info()
3494 static int display_crc_ctl_show(struct seq_file *m, void *data) in display_crc_ctl_show() argument
3496 struct drm_device *dev = m->private; in display_crc_ctl_show()
3501 seq_printf(m, "%c %s\n", pipe_name(i), in display_crc_ctl_show()
4103 struct seq_file *m = file->private_data; in display_crc_ctl_write() local
4104 struct drm_device *dev = m->private; in display_crc_ctl_write()
4209 static int i915_displayport_test_active_show(struct seq_file *m, void *data) in i915_displayport_test_active_show() argument
4211 struct drm_device *dev = m->private; in i915_displayport_test_active_show()
4226 seq_puts(m, "1"); in i915_displayport_test_active_show()
4228 seq_puts(m, "0"); in i915_displayport_test_active_show()
4230 seq_puts(m, "0"); in i915_displayport_test_active_show()
4253 static int i915_displayport_test_data_show(struct seq_file *m, void *data) in i915_displayport_test_data_show() argument
4255 struct drm_device *dev = m->private; in i915_displayport_test_data_show()
4269 seq_printf(m, "%lx", intel_dp->compliance_test_data); in i915_displayport_test_data_show()
4271 seq_puts(m, "0"); in i915_displayport_test_data_show()
4292 static int i915_displayport_test_type_show(struct seq_file *m, void *data) in i915_displayport_test_type_show() argument
4294 struct drm_device *dev = m->private; in i915_displayport_test_type_show()
4308 seq_printf(m, "%02lx", intel_dp->compliance_test_type); in i915_displayport_test_type_show()
4310 seq_puts(m, "0"); in i915_displayport_test_type_show()
4332 static void wm_latency_show(struct seq_file *m, const uint16_t wm[8]) in wm_latency_show() argument
4334 struct drm_device *dev = m->private; in wm_latency_show()
4359 seq_printf(m, "WM%d %u (%u.%u usec)\n", in wm_latency_show()
4366 static int pri_wm_latency_show(struct seq_file *m, void *data) in pri_wm_latency_show() argument
4368 struct drm_device *dev = m->private; in pri_wm_latency_show()
4377 wm_latency_show(m, latencies); in pri_wm_latency_show()
4382 static int spr_wm_latency_show(struct seq_file *m, void *data) in spr_wm_latency_show() argument
4384 struct drm_device *dev = m->private; in spr_wm_latency_show()
4393 wm_latency_show(m, latencies); in spr_wm_latency_show()
4398 static int cur_wm_latency_show(struct seq_file *m, void *data) in cur_wm_latency_show() argument
4400 struct drm_device *dev = m->private; in cur_wm_latency_show()
4409 wm_latency_show(m, latencies); in cur_wm_latency_show()
4447 struct seq_file *m = file->private_data; in wm_latency_write() local
4448 struct drm_device *dev = m->private; in wm_latency_write()
4490 struct seq_file *m = file->private_data; in pri_wm_latency_write() local
4491 struct drm_device *dev = m->private; in pri_wm_latency_write()
4506 struct seq_file *m = file->private_data; in spr_wm_latency_write() local
4507 struct drm_device *dev = m->private; in spr_wm_latency_write()
4522 struct seq_file *m = file->private_data; in cur_wm_latency_write() local
4523 struct drm_device *dev = m->private; in cur_wm_latency_write()
5080 static int i915_sseu_status(struct seq_file *m, void *unused) in i915_sseu_status() argument
5082 struct drm_info_node *node = (struct drm_info_node *) m->private; in i915_sseu_status()
5089 seq_puts(m, "SSEU Device Info\n"); in i915_sseu_status()
5090 seq_printf(m, " Available Slice Total: %u\n", in i915_sseu_status()
5092 seq_printf(m, " Available Subslice Total: %u\n", in i915_sseu_status()
5094 seq_printf(m, " Available Subslice Per Slice: %u\n", in i915_sseu_status()
5096 seq_printf(m, " Available EU Total: %u\n", in i915_sseu_status()
5098 seq_printf(m, " Available EU Per Subslice: %u\n", in i915_sseu_status()
5100 seq_printf(m, " Has Slice Power Gating: %s\n", in i915_sseu_status()
5102 seq_printf(m, " Has Subslice Power Gating: %s\n", in i915_sseu_status()
5104 seq_printf(m, " Has EU Power Gating: %s\n", in i915_sseu_status()
5107 seq_puts(m, "SSEU Device Status\n"); in i915_sseu_status()
5116 seq_printf(m, " Enabled Slice Total: %u\n", in i915_sseu_status()
5118 seq_printf(m, " Enabled Subslice Total: %u\n", in i915_sseu_status()
5120 seq_printf(m, " Enabled Subslice Per Slice: %u\n", in i915_sseu_status()
5122 seq_printf(m, " Enabled EU Total: %u\n", in i915_sseu_status()
5124 seq_printf(m, " Enabled EU Per Subslice: %u\n", in i915_sseu_status()
5367 static int i915_dpcd_show(struct seq_file *m, void *data) in i915_dpcd_show() argument
5369 struct drm_connector *connector = m->private; in i915_dpcd_show()
5398 seq_printf(m, "%04x: %*ph\n", b->offset, (int) size, buf); in i915_dpcd_show()