77 static void psb_intel_clock(int refclk, struct gma_clock_t *clock)  in psb_intel_clock()  argument
79 	clock->m = 5 * (clock->m1 + 2) + (clock->m2 + 2);  in psb_intel_clock()
80 	clock->p = clock->p1 * clock->p2;  in psb_intel_clock()
81 	clock->vco = refclk * clock->m / (clock->n + 2);  in psb_intel_clock()
82 	clock->dot = clock->vco / clock->p;  in psb_intel_clock()
115 	struct gma_clock_t clock;  in psb_intel_crtc_mode_set()  local
153 	ok = limit->find_pll(limit, crtc, adjusted_mode->clock, refclk,  in psb_intel_crtc_mode_set()
154 				 &clock);  in psb_intel_crtc_mode_set()
157 			  adjusted_mode->clock, clock.dot);  in psb_intel_crtc_mode_set()
161 	fp = clock.n << 16 | clock.m1 << 8 | clock.m2;  in psb_intel_crtc_mode_set()
171 			    adjusted_mode->clock / mode->clock;  in psb_intel_crtc_mode_set()
178 	dpll |= (1 << (clock.p1 - 1)) << 16;  in psb_intel_crtc_mode_set()
179 	switch (clock.p2) {  in psb_intel_crtc_mode_set()
247 		if (clock.p2 == 7)  in psb_intel_crtc_mode_set()
317 	struct gma_clock_t clock;  in psb_intel_crtc_clock_get()  local
341 	clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;  in psb_intel_crtc_clock_get()
342 	clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;  in psb_intel_crtc_clock_get()
343 	clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;  in psb_intel_crtc_clock_get()
346 		clock.p1 =  in psb_intel_crtc_clock_get()
350 		clock.p2 = 14;  in psb_intel_crtc_clock_get()
355 			psb_intel_clock(66000, &clock);  in psb_intel_crtc_clock_get()
357 			psb_intel_clock(48000, &clock);  in psb_intel_crtc_clock_get()
360 			clock.p1 = 2;  in psb_intel_crtc_clock_get()
362 			clock.p1 =  in psb_intel_crtc_clock_get()
368 			clock.p2 = 4;  in psb_intel_crtc_clock_get()
370 			clock.p2 = 2;  in psb_intel_crtc_clock_get()
372 		psb_intel_clock(48000, &clock);  in psb_intel_crtc_clock_get()
380 	return clock.dot;  in psb_intel_crtc_clock_get()
415 	mode->clock = psb_intel_crtc_clock_get(dev, crtc);  in psb_intel_crtc_mode_get()
452 	.clock = psb_intel_clock,