Lines Matching refs:u8
29 u8 signature[20]; /**< Always starts with 'VBT$' */
33 u8 vbt_checksum;
34 u8 reserved0;
41 u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
49 u8 type; /* 0 == desktop, 1 == mobile */
50 u8 relstage;
51 u8 chipset;
52 u8 lvds_present:1;
53 u8 tv_present:1;
54 u8 rsvd2:6; /* finish byte */
55 u8 rsvd3[4];
56 u8 signon[155];
57 u8 copyright[61];
59 u8 dos_boot_mode;
60 u8 bandwidth_percent;
61 u8 rsvd4; /* popup memory size */
62 u8 resize_pci_bios;
63 u8 rsvd5; /* is crt already on ddc2 */
107 u8 panel_fitting:2;
108 u8 flexaim:1;
109 u8 msg_enable:1;
110 u8 clear_screen:3;
111 u8 color_flip:1;
114 u8 download_ext_vbt:1;
115 u8 enable_ssc:1;
116 u8 ssc_freq:1;
117 u8 enable_lfp_on_override:1;
118 u8 disable_ssc_ddt:1;
119 u8 rsvd8:3; /* finish byte */
122 u8 disable_smooth_vision:1;
123 u8 single_dvi:1;
124 u8 rsvd9:6; /* finish byte */
127 u8 legacy_monitor_detect;
130 u8 int_crt_support:1;
131 u8 int_tv_support:1;
132 u8 int_efp_support:1;
133 u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */
134 u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
135 u8 rsvd11:3; /* finish byte */
199 u8 device_id[10]; /* ascii string */
201 u8 dvo_port; /* See Device_PORT_* above */
202 u8 i2c_pin;
203 u8 slave_addr;
204 u8 ddc_pin;
206 u8 dvo_cfg; /* See DEVICE_CFG_* above */
207 u8 dvo2_port;
208 u8 i2c2_pin;
209 u8 slave2_addr;
210 u8 ddc2_pin;
211 u8 capabilities;
212 u8 dvo_wiring;/* See DEVICE_WIRE_* above */
213 u8 dvo2_wiring;
215 u8 dvo_function;
221 u8 crt_ddc_gmbus_pin;
224 u8 dpms_acpi:1;
225 u8 skip_boot_crt_detect:1;
226 u8 dpms_aim:1;
227 u8 rsvd1:5; /* finish byte */
230 u8 boot_display[2];
231 u8 child_dev_size;
248 u8 panel_type;
249 u8 rsvd1;
251 u8 pfit_mode:2;
252 u8 pfit_text_mode_enhanced:1;
253 u8 pfit_gfx_mode_enhanced:1;
254 u8 pfit_ratio_auto:1;
255 u8 pixel_dither:1;
256 u8 lvds_edid:1;
257 u8 rsvd2:1;
258 u8 rsvd4;
262 u8 type:2;
263 u8 pol:1;
264 u8 gpio:3;
265 u8 gmbus:2;
267 u8 minbrightness;
268 u8 i2caddr;
269 u8 brightnesscmd;
276 u8 fp_table_size;
278 u8 dvo_table_size;
280 u8 pnp_table_size;
284 u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
307 u8 hactive_lo;
308 u8 hblank_lo;
309 u8 hblank_hi:4;
310 u8 hactive_hi:4;
311 u8 vactive_lo;
312 u8 vblank_lo;
313 u8 vblank_hi:4;
314 u8 vactive_hi:4;
315 u8 hsync_off_lo;
316 u8 hsync_pulse_width;
317 u8 vsync_pulse_width:4;
318 u8 vsync_off:4;
319 u8 rsvd0:6;
320 u8 hsync_off_hi:2;
321 u8 h_image;
322 u8 v_image;
323 u8 max_hv;
324 u8 h_border;
325 u8 v_border;
326 u8 rsvd1:3;
327 u8 digital:2;
328 u8 vsync_positive:1;
329 u8 hsync_positive:1;
330 u8 rsvd2:1;
337 u8 mfg_week;
338 u8 mfg_year;
360 u8 aimdb_id;
366 u8 fp_timing_size;
368 u8 dvo_timing_size;
370 u8 text_fitting_size;
372 u8 graphics_fitting_size;
381 u8 panel_backlight;
382 u8 h40_set_panel_type;
383 u8 panel_type;
384 u8 ssc_clk_freq;
387 u8 sclalarcoeff_tab_row_num;
388 u8 sclalarcoeff_tab_row_size;
389 u8 coefficient[8];
390 u8 panel_misc_bits_1;
391 u8 panel_misc_bits_2;
392 u8 panel_misc_bits_3;
393 u8 panel_misc_bits_4;
402 u8 boot_dev_algorithm:1;
403 u8 block_display_switch:1;
404 u8 allow_display_switch:1;
405 u8 hotplug_dvo:1;
406 u8 dual_view_zoom:1;
407 u8 int15h_hook:1;
408 u8 sprite_in_clone:1;
409 u8 primary_lfp_id:1;
413 u8 boot_mode_bpp;
414 u8 boot_mode_refresh;
431 u8 static_display:1;
432 u8 reserved2:7;
435 u8 legacy_crt_max_refresh;
437 u8 hdmi_termination;
438 u8 custom_vbt_version;
467 u8 rate:4;
468 u8 lanes:4;
469 u8 preemphasis:4;
470 u8 vswing:4;